Switch Chips Debut at Conference
Until now, the company's Prestera line of parts has been aimed at Ethernet enterprise switches. The new chips move Prestera into the realm of chassis-based boxes. They're capable of handling multiple services, but the real target market is still Ethernet, says Paul Valentine, Marvell senior product manager.
Like most switch fabric vendors, Marvell is bragging about the chips' scaleability. The company claims to be able to build larger switches simply by piling on more of the FX9130 switching chips, allowing each of the FX930s (one on every line card) to forward cells to a few different FX9130s, even when it means splitting up a particular traffic flow.
To reconcile each data stream at the egress, the FX930s and FX9130s have to stay in constant communication, meaning the chips have to be purchased and applied as a set. "We've added some data-lane communication between the two to add some feature visibility," Valentine says.
The FX9130 is shipping now. The FX930 line-card chip is due in a few weeks.
The chipset "gets Marvell above 1 Gigabit a second for the first time and gives it a route to multiservice," says Simon Stanley, founder and principal consultant of Earlswood Marketing Ltd. and author of a Light Reading report on Packet Switch Chips.
Stanley also thinks the announcement is significant for Dune on a couple of counts. First, it's going to take Dune quite a long time to generate revenues from its own chips, so having royalty payments from Marvell will help keep the wolf from the door. Second, having its technology adopted by a big player like Marvell could help it win other business.
TeraChip announced an interface chip to go with its existing TCF16X10 switching element. TeraChip uses a shared-memory architecture that theoretically could operate without an interface chip on each line card (see TeraChip's Retro Switch Silicon) -- but that assumes the line-card output is in the right format for the interface chip.
Usually it isn't, meaning the system vendor has to come up with an FPGA (field programmable gate array) that does the proper interface translation. It sounds straightforward enough, but TeraChip officials contend it's a complicated chore. "This translation layer is becoming the most painful point for customers," says Dror Sal'ee, TeraChip vice president of marketing.
For customers designing a box or in the early stages of shipping, TeraChip will provide the FPGA itself, preconfigured to handle the necessary translation. For customers going to higher volumes, TeraChip will fashion the interface FPGA into an ASIC (application-specific integrated circuit).
— Craig Matsumoto, Senior Editor, Light Reading