Xelerated Touts 40-Gig Toolbox
Many of the big chip makers such as Agere Systems (NYSE: AGR) and Applied Micro Circuits Corp. (AMCC) (Nasdaq: AMCC), have 40-Gbit/s network processors on their roadmaps, but are still struggling to roll out 10-Gbit/s solutions (see OC192 Processors: Who's First?). And other startups targeting 40-Gbit/s straight off, namely, ClearSpeed Technology Ltd. and Teradiant Networks Inc., appear to be behind Xelerated in their development.
Network processors are programmable chips that should give systems vendors an alternative to developing their own ASICs for packet processing. Software is very important, because the system vendor must now use the functions delivered by the software to differentiate its product, rather than building them directly into silicon.
The development tools allow the system vendor to build applications. In Xelerated's case, these tools comprise an assembler and linker for compiling the code, a simulator, which is used to debug the code, and a batch of sample applications, including MPLS, IPv4, and IPv6.
Xelerated says the tools are available immediately, although it has yet to close any deals with customers.
It's worth pointing out that Xelerated's network processor, the X40, will not be available until the summer, but having tools ready in advance of the actual silicon is a good idea because it allows potential customers to evaluate the product, says Xelerated's CEO Johan Börje. In addition, systems vendors can start developing applications for the target system as early as possible, thus speeding up time to market.
"Now, for the first time, customers can really evaluate the truth of what we've been communicating to them," he says.
"The truth," according to Börje, is that Xelerated's network processor has a very simple programming model. And that's no small thing.
In real life, many network processors have turned out to be total pigs to program, so system vendors haven't been any better off than they were when they had to make their own ASICs. Instead of spending loads of time and money developing ASICs, system vendors spend loads of time and money writing incredibly complicated programs in assembly code.
Most network processor vendors, including Agere and AMCC, figure that the way around programming prolixity is to offer a high-level programming language, which hides the complexity of the assembly language from the user.
But Börje contends it's a bit of a myth in the industry that a high-level language is the answer to all ills. "You will never construct a compiler that is so intelligent that it can optimize everything. You'll always have to go to a low level to fine tune -- tune with your hands, if you like."
In fact, Xelerated originally had a high-level language on its roadmap but has now satisfied itself that the assembly code is adequate. And, having seen that code, only one potential customer has still demanded to see a high-level language, Börje claims.
As noted, the reason the code is simple is because of the architecture. Xelerated uses what it calls a "multistage programmable pipeline" (see Swedes Claim Processor Advance). There are 200 stages in the pipeline, and on every clock tick, the packet moves on to the next stage, along with some context to tell subsequent stages how to deal with the packet. That means on every clock cycle, one packet goes into the processor and one packet comes out the other end.
Other types of network processor complete the processing of a single packet before they take in another. Since packets can be long or short, and instructions can be easy or difficult to execute, the length of time it takes to process a packet varies. As a result, the programmer has to decide how to balance instructions among different processor cores. And that's what complicates the programming procedure, Börje contends.
That may be the case, but there are other, compelling reasons to choose a high-level language, according to Robin Melnick, director of product marketing for AMCC's network processor group. First and foremost, it allows both the chip maker and the system vendor to protect their investment in software development. The system vendor can upgrade chips without having to rewrite the program. "From our perspective, we're not having to roll out a new software architecture and applications at the same time we roll out a new chip," he says.
Of course, this point is not necessarily relevant to Xelerated right now, which is jumping in feet first with 40 Gbit/s. But it could become so in the future.
— Pauline Rigby, Senior Editor, Light Reading