Zarlink Intros Tiny Sonet/SDH Timing Chip

Zarlink claims world's smallest digital timing chip for Sonet/SDH line cards

December 1, 2004

1 Min Read

OTTAWA -- Zarlink Semiconductor (NYSE/TSX:ZL) today introduced the ZL(TM)30108, the world's smallest DPLL for optical line cards operating at rates up to OC-3/STM-1. The device delivers unparalleled features in a tiny footprint for the carrier-class transport of voice, data and multimedia traffic across high-speed networks.

Measuring just 5 mm (millimeters) x 5 mm, the ZL30108 DPLL addresses dense line card "real estate" constraints. The device may be used in combination with Zarlink's family of analog PLLs to provide an end-to-end timing and synchronization solution for higher-speed SONET/SDH networking equipment. For example, the ZL30108 DPLL and ZL30415 analog PLL provide an easy-to-implement, compact solution for OC-12/STM-4 line cards.

"The ZL30108 timing chip is the 'total package' in the industry's smallest footprint. It combines features such as jitter filtering and hitless reference switching and delivers optimized performance when used with a Zarlink analog PLL, together with jitter capabilities to meet OC-3/STM-1 requirements," said Darren Ladouceur, marketing manager, Timing and Synchronization, Zarlink Semiconductor. "Competing devices do not provide the same mix of performance and features, and none equal its extremely small size."

Zarlink Semiconductor Inc.

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