Optical components

Intel Fires Up Silicon Laser

Still questing to produce silicon photonics, Intel Corp. (Nasdaq: INTC) announced today a hybrid chip that acts as an electrically pumped laser.

It's the most promising development yet from Intel's silicon photonics research, because the results are made to be mass-producible and cheap enough to use for chip-to-chip interconnect inside servers and even PCs. (See Intel Debuts Laser.)

"Someday" is still a ways off, though. "You'll hopefully see this technology in the early part of the next decade," said Mario Paniccia, director of Intel's Photonics Technology Lab, during a news conference this morning.

Intel developed the laser with Intel-funded help from the Optoelectronics Technology Center of the University of California at Santa Barbara , an institution housing some noteworthy optics research. UCSB professor and Calient Technologies Inc. founder John Bowers had a hand in the research and spoke at the news conference as well.

The results are being presented today at the Institute of Electrical and Electronics Engineers Inc. (IEEE) International Semiconductor Laser Conference in Hawaii. (Tough life for Bowers, going between Santa Barbara and Hawaii.)

Intel's goal is to produce optical components in silicon using complementary metal-oxide semiconductor (CMOS) processes -- the manufacturing processes that build the majority of the world's chips. CMOS optics would likely be cheaper than those made from materials such as indium phosphide (InP) and could eliminate the laser-alignment steps that add cost to some optical components.

The obsession with optical comes from the increased speeds that telecom and computing equipment will experience in years to come. Copper lines aren't likely to keep up with those speeds, but optics so far have been too expensive to consider using in PCs and servers.

Silicon photonics research is going on at universities worldwide and at a few startups, such as Luxtera Inc. , although Luxtera isn't working on CMOS lasers. (See Luxtera Launches Silicon Optics.)

Silicon can't generate light on its own -- not in any mass-producible way that works under normal conditions, anyway -- so Intel and UCSB use InP to get their laser started.

The InP portion generates the initial light. The silicon portion bounces the light back and forth in a waveguide that acts as a laser cavity. From there, the process is a lot like a normal laser: The light bounces back and forth in the cavity and eventually gets spat out as a laser beam.

This is not the same thing as using an InP laser to start the process, which of course would be cheating. The silicon portion contributes 97 percent of the light energy generated, Paniccia said, and it's the silicon that determines the laser's performance and could determine its wavelength as well.

Researchers have gotten the lasers to produce light of 1.8 milliwatts -- good enough for chip-to-chip optical interconnects -- from an input power of 65 milliamps; the plan is to get that threshold current down to about 20 mA. The lasers can operate at 40 degrees Celsius, and the researchers expect to push that to 70 degrees with the next round of devices.

"These are not record results. These are typical results we are getting out of these devices today," Bowers said.

The breakthrough here is that the chip is electrically pumped. Intel announced silicon lasers last year, but those had to be optically pumped -- that is, they had to sit aside a normal, non-silicon laser. Intel called the result a scientific breakthrough, but it didn't lend itself to mass production. (See Intel Claims Laser Breakthrough.)

Getting the electrically pumped chip to work was just part of the problem. Intel also wanted to bond the InP and silicon pieces in a way that could be done for hundreds of devices at a time (bonding them one laser at a time would be easy but wouldn't jibe with server/PC economics). That involved developing new techniques at UCSB, using "layers about 25 atoms thick" on the silicon and InP devices to bond them together, Bowers said.

(For chip geeks: That bonding is done at a wafer scale, meaning they slap the big wafers of CMOS and InP together before cutting them up into chips. One key to UCSB's bonding method is that it's based on tools similar to those in use today.)

Intel is being vague about applications for the hybrid optical chip, but it seems likely the technology will be aimed at servers and supercomputers. Paniccia and Bowers mentioned telecom possibilities several times during the news conference, however, and the hybrid device operates in the 1550nm wavelength range, which adheres to telecom standards. Fiber-to-the-home could be one area that finds the device useful, Paniccia said.

The device could be applied to optical amplifiers as well, and might have a role to play in biotech, he added.

Intel's other silicon photonics research is continuing, of course. The optically pumped laser announced last year is still in development and could have applications in areas like amplifiers, Paniccia said. Other pieces of the optical networking chain are making progress, too. Paniccia noted that Intel has gotten silicon-germanium photodetectors to work; they would be the on-chip counterparts to the silicon lasers. Separately, he said the company is "still aggressively pursuing" the silicon modulator announced two years ago. (See Intel's Modest Modulator .)

— Craig Matsumoto, Senior Editor, Light Reading

Page 1 / 2   >   >>
redface 12/5/2012 | 3:40:33 AM
re: Intel Fires Up Silicon Laser "(For chip geeks: That bonding is done at a wafer scale, meaning they slap the big wafers of CMOS and InP together before cutting them up into chips. One key to UCSB's bonding method is that it's based on tools similar to those in use today.)"

I doubt the above statement is true. If it is, then we are talking about making 10 or so integrated devices on a full wafer at a time which is probably not economical, instead of making a few hundred of them at a time which may be worthwhile. This is because InP wafers are typically small (2 inch diameter for example) while silicon wafers can be 8 inch in diameter. Die bonding has to be used in hybrid integration of silicon and InP.

Looks like the main advantage of the breakthrough in this article is that precise alignment of the InP to silicon wafer is not necessary because silicon waveguides define all features optical.

Pete Baldwin 12/5/2012 | 3:40:33 AM
re: Intel Fires Up Silicon Laser (Redirecting the thread Redface started under the News Wire story...)

Redface says:
I wonder why Intel Photonics keeps playing with this futuristic approach while having no solution for current market opportunity such as FTTH? If a supposedly low cost approach like silicon photonics has no solution for a real market opportunity such as FTTH which demands low cost, what good is it?

I think this research is pointed more at the future of computing (servers in particular) than at FTTx. That the stuff might work in telecom circles is kind of side effect.

Now, Intel did mention FTTx in the news conference. But I think that was mainly because it's a buzzword now. My recollection from years past is that Intel has talked about computing first when it comes to silicon optics.
whyiswhy 12/5/2012 | 3:40:32 AM
re: Intel Fires Up Silicon Laser As far as I am aware, 8 inch fabs are getting old having been around since 95-00. Today's Silicon fab is more like 12 inches in diameter, and 18 inch is just around the corner.

It's hard to imagine InP being wafer soldered to Si and then diced, as it's hard to imagine 12 inch diameter InP wafers.

Thus the caveat: "someday".

It's hard to tell if this will have any real payoffs by the time it happens.


tsat 12/5/2012 | 3:40:32 AM
re: Intel Fires Up Silicon Laser I think this is a great breakthrough, but it seems like there are scores of other technologies that have to mature to get it all working. How are you going to pipe the light off the wafer, through a PCB and into another chip? What about the packaging technology?
sigint 12/5/2012 | 3:40:31 AM
re: Intel Fires Up Silicon Laser tsat:
I think this is a great breakthrough, but it seems like there are scores of other technologies that have to mature to get it all working. How are you going to pipe the light off the wafer, through a PCB and into another chip? What about the packaging technology?

I would guess that wiring two devices on the same board using optical might be an overkill. Afterall, 10G on a single copper diff pair over short lengths is commonplace. And this too, driven from InP or GaAs serialisation stages - silicon fails before copper does, as of today.

This may open up interesting possibilities for back-plane applications, though. Hybrid backplanes have been around for a while, but never really caught on. No so much the cost of the back plane itself, but cost of optics required.
agility1 12/5/2012 | 3:40:30 AM
re: Intel Fires Up Silicon Laser A nice development to extend the work of the last 15 years by several IC companies (esp. Intel & Motorola) on optical chip to chip (and perhaps on chip as well) interconnects! I'm sure Mario is right that it'll be no sooner than early next decade when this could hit commercialization. Timing is likely to be driven more by the ability of current interconnect technology to evolve to higher speed - as always, the incumbent doesn't give up easily! It's great to see John's bonding approach evolve toward a high impact use.

However, I suspect that the timing and hype behind this development has more to do with internal politics at Intel - with the objective being to keep funding flowing for photonic related R&D at a time when Paul is chopping heads and expenses left and right!

Intel needs to get back to the lean and mean teams they had 20+ years ago rather than the bloated infrastructure they've been able to afford for the last 15 with their huge but declining margins. Hector and team are kicking their butts!

Anyone know what the story is on the reliability of these bonded InP devices? The failure rate on chip to chip interconnects has to be very low!
DZED 12/5/2012 | 3:40:30 AM
re: Intel Fires Up Silicon Laser "we have demonstrated a novel laser structure based on a bonding method that can be used at the wafer-, partial-wafer or die-level"

Die level is probably the key bit. If the two technologies can be hybridised without extremely accurate pick and place eqpt needed for opto but with CMOS yields (which are a bit better than opto?) then we have a winner.

Some innovative packaging would be essential also, the building blocks are here and there.

I know nothing about servers but at higher frequencies fibre would offer multiple benefits over current interconnect technologies. Isn't that why telecoms are moving to optics?

As freqencies increase the reach at which optics becomes useful gets shorter. And a hybridised uncooled laser working at 70C is going to make transceivers cheap.
^Eagle^ 12/5/2012 | 3:40:29 AM
re: Intel Fires Up Silicon Laser While I think this breakthrough is indeed that, it is not quite the story that is being hyped.

Truth is that the technology is no different than many other external cavity lasers in it's basic concept.

The story of it being a breakthrough in that sense is mis-leading.

They use a broadband gain chip (like an FP laser or SOA or SLED) made in InP. The main difference between this and other external cavity lasers is that the cavity and gratings that set the wavelength is in the silicon part of the assembly. Also other ECL (external cavity lasers) typically use bulk optics placed on an optical bench by pick and place tools to couple the gain chip to the resonating cavity.

but from a fundamentals point of view, basically it is the SAME as other ECL designs.

Check out RIO's ECL laser. Also as mentioned in article, Luxtera is pursing similar research and in some ways is ahead of Intel on this.

The secret sauce here is the bonding the InP chips directly to the CMOS silicon wafer.

I would wager that it is not being done at "wafer to wafer" level. More likely it is being done with individual InP chips being bonded to the CMOS wafer or perhaps bars of InP chips being bonded to the CMOS bars (bars cleaved from the wafer). Why and others are correct that it is almost certainly not wafer to wafer. This would be nearly impossible as the yeild from sector of wafer to other sector of wafer is variable and you would have no way to know if it was a good InP chip until too late in the process.

The big breakthrough is that they have figured out an efficient way to do the bonding and that they have done multiple lasers on one CMOS substrate.

Also that they have mastered so many different optical building blocks in CMOS and are getting close to being able to do true "systems" on a "chip/wafer".

I believe the first application will be for backplane interconnect between processors and memory and processors to I/O in servers and high end routers and other computing platforms.

With processors running at multiple gigabits and many high end machines having many processors, being able to stream gigabits and even terabits for short distances inside computing platforms would eliminate a big bottleneck. Today while copper can run some high speed apps, it cannot scale past about 1 to 1.5 Tbits and that is very hot and expensive to do at those rates (check out Avici routers for the highest end of copper backplanes)

I also think that the technology would be very applicable to storage arrays in the data center and for sort reach clustering applications and possibly cheap optics to the desktop.

Also quite useful for embedded sensors, small fiber gyro's for automotive and transportation, etc.

FTTH? Perhaps, but I think Intel is going for even higher volume applications.

Again, I do think it is a great step forward and I take my hat off to Mario and his team. I just think this is a process, scale and method breakthrough. not a fundamental new way to make a laser. It is a simple ECL, just done elegantly and in a scalable way. This will be good for Intel going forward. And will turn into a large commercial application in future. after all, early next decade is coming up fast.

deauxfaux 12/5/2012 | 3:40:29 AM
re: Intel Fires Up Silicon Laser Great research with a 10 year horizon for commercialization. Wafer bonding is a tough technology to master, and even when you do, the basic characteristics of the materials are usually the limiting factors.

InP to Si joints on P-down lasers require a compliant gold layer to relieve the CTE induced stress problems.

Shock these things -40 to 85 500 times or so in an open forum and I will be the first guy to applaud.
Stevery 12/5/2012 | 3:40:29 AM
re: Intel Fires Up Silicon Laser I'm curious: Can anyone name an instance where UCSB issued a joint press release with a large company that announced a technology that later went onto commercial success? (Does UCLA have any better record?)

Related question: Which of the many variations of GaAs-on-Si went onto commercial success? (I can't think of any.) Why would we believe that InP-on-Si is different?

Page 1 / 2   >   >>
Sign In