Jennic Intros SPI-4.2 Core

Jennic launches its SPI-4.2 interface to address emerging 10G line card applications

November 8, 2002

1 Min Read

SHEFFIELD, England -- Jennic, a leading supplier of system-level intellectual property (IP) cores and silicon design services, today announced the launch of its second generation SPI-4.2 Physical and Protocol Interface IP cores to address the requirements of next-generation line cards. These fully integrated IP cores are available to semiconductor vendors and system OEMs for incorporation directly into ASSPs or as ASIC/FPGA IP library components. The Optical Internetworking Forum (OIF), System Packet Interface 4, Phase 2 (SPI-4.2) is rapidly becoming the de-facto standard for providing the interconnect between many of the components, such as the physical layer framers, traffic managers, network processors and switch fabrics found on the OC-192 (10G) line cards used within today's high capacity packet routers. "The introduction of our second generation SPI4.2 Interface is in response to the evolving engineering needs in the development of line-cards for Optical and Storage Area Networks," comments Frank Newcombe, Business Development Manager for Optical Networks at Jennic. "Our solutions have been developed in consultation with the leading OEMs and semiconductor suppliers of line-card components to ensure they incorporate the features and performance required for the next generation of applications."Jennic Ltd.

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