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Claims it's first to guarantee QOS while handling terabits-a-second of packet-based traffic
June 10, 2002
It’s sometimes said that it’s impossible for quality of service to be guaranteed in router networks because they work on the principle of dealing with congestion once it’s occurred, rather than preventing it in the first place.
All the same, there’s never been a shortage of vendors claiming they can achieve the impossible. The latest example of this is Broadcom Corp. (Nasdaq: BRCM). It claims that the switching fabric it plans to announce today (sooner or later) will be the first capable of handling terabits-a-second of packet-based traffic while guaranteeing quality of service (QOS).
"Our competition delivers best-effort classes of service," contends Eric Hayes, product line manager for Broadcom's BCM83xx chipset. "Even the highest class of service is only best effort."
According to Hayes, the difference lies in the way that packet-based switch fabrics queue and schedule the traffic passing through them. To understand what he means entails digging a little deeper into the architecture.
Packet-based switch fabrics have two elements: an interface chip sitting on the line card, which sorts the traffic into different queues based on its destination and its QOS level; and a crossbar chip that performs the actual switching. Broadcom's chipset is consistent with this basic setup: The fabric interface chip is part number BCM8320, and the switch fabric itself is BCM8332.
Some switch fabrics perform all the sorting and queuing on the interface chip. Broadcom, however, has put additional functions onto the fabric chip. At each output, the traffic is queued according to the input port it has come from as well as its QOS level.
As a result, if one particular customer violates its service-level agreement, by sending in too much traffic, the fabric can hold up the traffic from that customer without affecting anyone else that might be using bandwidth at the same output port.
Other switch fabric chipsets can't do this, Hayes contends, because they don't maintain individual queues relating to each input. Instead, they collapse all the traffic for each output port down to a single queue. The upshot is that if one particular customer's connection is oversubscribed, it clogs up the queue, and all the traffic going to the same output is delayed.
But it takes more than that to impress RHK Inc. analyst Russell Johnson. "It doesn't sound all that novel to me," he says. He is aware of at least 30 companies making so-called intelligent switch fabrics and says there others are working on similar technology.
Broadcom, however, is probably among the first to bring the advanced queuing technology to market, and it deserves credit for that. Both chips in its fabric are expected to ship in the next few months.
And when it comes to companies actually shipping terabit products, there aren't so many after all. One of the leading vendors in this field is Applied Micro Circuits Corp. (AMCC) (Nasdaq: AMCC), through its acquisition of Yuni Networks, with a chipset it claims can scale to 1.2 Tbit/s of real terminated traffic (see AMCC Raises Eyebrows).
The other is Agere Systems (NYSE: AGR), which introduced its PI-40 chipset earlier this year, which is supposed to scale to 2.48 Tbit/s of terminated traffic (raising even more eyebrows). "We have silicon which puts us ahead of Broadcom," notes Krishna Mallampati, Agere's product marketing manager for the PI-40.
Passing mention also goes to IBM Corp. (NYSE: IBM), which offers a chipset that handles 320 Gbit/s of traffic, although it is thought to have a true terabit-sized fabric in development.
Broadcom's chipset actually maxes out at 640 Gbit/s of real terminated traffic -- only half of the purported capacity of AMCC's fabric and one quarter of Agere's (not terabits a second, as it claims). Not to be put down, Hayes points out a number of other advantages to Broadcom's switch fabric.
For starters, Broadcom claims that its chipset is more highly integrated, comprising just two chips. All the memory, scheduling functions, and the SerDes interfaces (which collapse traffic into high-speed serial channels for transmission across the backplane) are integrated in the chip. AMCC's Yuni chipset, for example, consists of four different chips.
The other key feature that Broadcom is touting is its automatic redundancy scheme. Other vendors have this too, but only at the chip level, meaning that if a single switch chip fails, the others automatically take up the strain. Broadcom's redundancy is at the SerDes-link level, so a single input to a switch chip can go down without affecting the other channels on the chip.
RHK's Johnson does believe that the BCM83xx will be a successful product, but more because of Broadcom's status as an established company rather than its technology. "The future doesn't belong to startups," he says.
— Pauline Rigby, Senior Editor, Light Reading
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