Fulcrum Beats the Clock

A 'clockless chip' out of CalTech aims to reshape the way line cards are designed

August 19, 2003

4 Min Read
Fulcrum Beats the Clock

Asynchronous logic is one of those topics that triggers deep curiosity or the rolling of eyes, depending on whom you ask. The concept -- involving chips that work without a clock -- seems to be continually tossed around in universities, where research focuses on getting the stuff to work and/or finding some useful application for it.

Whether the idea is righteous or ridiculous, one startup claims to have it working -- and has an application in mind, one that could put a miniature switch on every line card.

Fulcrum Microsystems Inc. is using research begun at the California Institute of Technology (Caltech) to produce PivotPoint, a six-port device that hooks up to chips using the SPI-4 interface. Co-founder Uri Cummings presented the device today at Hot Chips, an annual Silicon Valley conference where electronics experts discuss the finer details of chip design.

Fulcrum, a 30-employee company, picked up $14 million in Series C funding last month, bringing total investment in Fulcrum to $36 million. New investor Palomar Ventures led the round, which also included Infinity Capital, New Enterprise Associates (NEA), and WorldView Technology Partners.

At PivotPoint's heart is a crossbar called Nexus, and it's there that the asynchronous magic resides. More on that later.

PivotPoint connects line-card chips such as network processors, general-purpose processors, security processors, or traffic managers. These chips tend to be arranged in a pipeline, where data is supposed to pass through each chip in sequence without backtracking. But what if, instead, you allowed the data to bounce from chip to chip, revisiting a stop multiple times if necessary?

That's possible, using an FPGA (field-programmable gate array) as the chip-to-chip interface -- what's commonly called "glue logic" -- but Fulcrum claims its chip is a more compact and flexible option. PivotPoint becomes a little switch fabric on the line card, permitting two-way connections between any two chips.

In a sense, this allows the line card's chips to pool their resources, which allows for more complex features than the assembly-line method can manage. "People are starting to pull processing into the data path and are looking for more flexibility in their hardware," says Mike Zeile, Fulcrum vice president of marketing.

PivotPoint is also a cheaper alternative, costing roughly $225; one potential customer would use the chip to replace two $1,000 FPGAs, Zeile says.

To the outside observer, that's all there is -- the "asynchronous" part is hidden inside PivotPoint. But if you really want to know, here's why asynchronous chips are a big deal.

Most chips are beholden to a clock, represented by electronic pulses sent throughout the chip. Think of it as an assembly line, with a widget moving from Stage A to Stage B at every clock tick. Without the clock, the widget could arrive before Stage B is finished with the previous widget.

Asynchronous logic would let the chip operate without the clock. One advantage to this is performance. The clock period is padded with margin time to accommodate for things like signal jitter or worst-case logic execution. This overhead gets bigger as chip technology gets more advanced, a phenomenon called "process slop," Cummings says.

There's also a power-savings benefit, as you aren't pumping clock signals to unused portions of the chip.

But asynchronous logic still needs a way around the "racing" problem. Some lines of research, for example, have involved inserting delays into the circuitry to prevent "fast" data from overtaking slower data. Fulcrum's architecture eschews that approach in favor of a "handshake." When Stage B is done with a task, it notifies Stage A -- and only then will Stage A forward its data to Stage B.

Using this architecture, PivotPoint is able to shuttle data quickly -- latency tends to be 3 nanoseconds, Zeile says. Getting back to the line-card application, this makes it feasible to shuttle data between chips a couple of times, as often happens with security-heavy applications, Zeile says.

"The reason people haven't driven switching onto the line card is latency," he says. "We end up barely affecting the cumulative latency of the system."

Fulcrum wants to do more, though. The original plan was to add some processing intelligence to PivotPoint, allowing it to talk to content processors to enable Layer 4 through Layer 7 services. The second version of the chip will lean this way, and will also support the HyperTransport and PCI Express chip interfaces, Zeile says.

The initial PivotPoint chip, named the FM1010, is due to sample in October, with production volumes slated for the first quarter of 2004.

— Craig Matsumoto, Senior Editor, Light Reading

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