Mindspeed Integrates With Xilinx

Announce fully interoperable OC192 Packet-over-Sonet solutions

November 15, 2001

2 Min Read

NEWPORT BEACH, Calif. -- Mindspeed Technologies(TM), the Internet infrastructure business of Conexant Systems, Inc. (Nasdaq:CNXT), and Xilinx Inc., the leader in complete programmable logic solutions (Nasdaq:XLNX), today announced that the two companies have successfully completed comprehensive interoperability testing of Mindspeed's OptiPHY-F10G OC-192 SONET framer with the Xilinx(R) POS PHY Level 4 (PL4) cores. As a result, the companies offer a seamless solution for customers interested in designing an OC-192 Packet-over-SONET application. The OptiPHY-F10G framer and PL4 cores have proven to be fully interoperable via the framer's Optical Internetworking Forum (OIF) System Packet Interface-4 (SPI-4) Phase 2 standard. The OptiPHY-F10G is the first SONET framer with an embedded SPI-4 Phase 2 interface to be tested at full speed with a PL4 core in the Virtex(R)-II FPGA. The SPI-4 Phase 2 interface ensures a low-power and low-pin-count interface enabling significantly easier, less expensive integration of next-generation equipment designs. Customers will now be able to integrate the Mindspeed framer and Xilinx FPGAs to speed up the designs of high-performance SONET applications for metropolitan area optical network systems. The combination of the Xilinx Virtex(R)-II FPGA and the Mindspeed framer can provide the bandwidth and flexibility necessary to handle increasing networking traffic. Reference boards demonstrating this interoperability with a full set of software drivers, including graphical user interface and user manual, are available today for both OC-192 and OC-48 data rates at www.xilinx.com/company/reference design/mindspeed.htm. "Integration of the OIF standard SPI-4 Phase 2 interface into Mindspeed's OC192/4xOC-48 SONET/SDH framer provides our customers with the ability to quickly develop line cards that support a wide variety of protocols for high-performance Packet-over-SONET applications," said Ali Mesri, vice president of marketing with Mindspeed. "The low power and low pin count of the SPI-4 Phase 2 interface could easily interface to Mindspeed's iScale(TM) switch fabric via Xilinx Virtex-II FPGAs and a new generation of OC-192 network processors for ease of design and integration."Mindspeed TechnologiesXilinx Inc.

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