Chip Design Fights Smartphone Power Limits
The idea is to turn parts of the chip into specialty processors, wired to perform functions that pop up all the time. The researchers named them conservation cores (c-cores, for short), and one key is that they eat up much less power than a general-purpose microprocessor.
The idea got presented yesterday at HotChips, an annual gathering at Stanford University where engineers meet to discuss the latest design innovations in semiconductors. To the people who work with transistors and interconnects, HotChips is a big deal. It's a venue for proudly announcing major designs, such as the combined processor/graphics chip at the heart of the latest Xbox 360.
Nathan Goulding, who's about to start his fourth year of PhD. studies at UCSD, presented the c-cores idea. The research is being led by assistant professors Michael B. Taylor and Steven Swanson.
Don't expect any commercial chips out of this right away. It's still a research project, although Goulding and his colleagues plan to work on a protoype chip aimed at the Android platform.
The c-core design is a response to the power constraints in handsets. Each chip generation packs more transistors into a small space, and it's gotten to a point where you can't run every part of the chip, because it would overwhelm a smartphone's power budget.
The fraction that's not usable at any given time -- dark silicon, researchers call it -- is growing exponentially as semiconductor manufacturing processes get more advanced.
The answer was to single out the functions that get called repeatedly -- hot code -- and move them to specialty, low-power processors that sit alongside the main microprocessor.
The catch is that the c-cores take up extra chip space. And for some mobile designs, where chips have to be as small as possible, that's been unthinkable -- like saving room on a life raft for your bowling ball collection. Goulding argued that's no longer the case.
"Power is now more expensive than area, so if we can trade area for reduced power, it's a win," Goulding said.
The energy savings come from the c-cores' more economic design. The UCSD team found that c-cores can consume as little as 8 picojoules per instruction, compared with the 91 picojoules that's typical for a MIPS microprocessor.
The c-cores can be reprogrammed, so that as the smartphone or handset receives software upgrades, the types of functions offloaded can be changed accordingly.
For their first real chip, the UCSD team is targeting the Android operating system because it seems particularly well suited to this offload idea; it just happens to have a lot of hot code to play with, in the way it uses libraries and its virtual machine. Goulding's presentation included a grocery list of candidate hot-code functions.
They're calling the chip GreenDroid, and it will consist of 16 blocks. Each are 1 mm2 and contain a MIPS microprocessor and six to 10 Android c-cores. The blocks can talk to each other and can send messages off-chip as well.
The team does have some hardware completed, as they're running Android-based c-cores in a Field Programmable Gate Array (FPGA). They're hoping to eventually produce a GreenDroid ASIC, but Goulding didn't say how long that would take.
The central concept behind c-cores isn't that new. Really, they're offload engines, said Alex Bachmutsky, chief architect at Nokia Networks , in a post-session chat with Light Reading. It's analogous to the specialty cores built for, say, encryption. And the use of specialty hardware on a large scale is being pondered at places like IBM Corp. (NYSE: IBM), with its Cell architecture.
Still, that doesn't mean UCSD isn't on to something. Bachmutsky gave them credit for some solid work. "For a university, this is very good," he said.
— Craig Matsumoto, West Coast Editor, Light Reading