Ethernet Backplanes Approach 10 Gig

The IEEE 802.3ap standards effort is making progress, piggybacking on other 10-Gig Ethernet work

October 5, 2004

3 Min Read
Ethernet Backplanes Approach 10 Gig

Standards efforts for a 10-Gbit/s Ethernet backplane are underway and going smoothly, according to participants returning from last week's Institute of Electrical and Electronics Engineers Inc. (IEEE) meetings.

The 802.3ap task force is still in its early stages, with members hoping to get a standard defined by 2006. The idea is to use an ordinary copper backplane (no fancy optics here) to send 10-Gbit/s Ethernet signals between cards. A standard would give systems designers a head start, allowing them to choose among several physical-layer chips that would be prewired for the standard.

Note this isn't the same as prior IEEE efforts for 10-Gbit/s Ethernet over copper. Standards including 802.3ak (the CX4 standard) and 802.3an (10GBase-T) target specific types of copper cabling (see 10-GigE Copper Heats Up). The backplane is a different medium, dealing with copper traces embedded in board material, the most common being FR4.

Still, the standard will almost certainly borrow from other IEEE 10-Gbit/s work. Here are the three subsections of the standard:

1-Gbit/s: This is the easy case. The group will use the established 1000-BaseX standard for Ethernet.

10-Gbit/s parallel: This is the more immediate of the 10-Gbit/s options, splitting the signal into four lanes of 3.125 Gbit/s each. Two standard interfaces already do this: XAUI, which was developed with the original 10-Gbit/s Ethernet standard, and the 10G-BaseCX standard for 10-Gbit/s Ethernet over copper. Some combination of the two seems likely to win out. "This is pretty much done," says Dmitri Taich, applications manager for Mysticom Ltd.

10-Gbit/s serial. Here we get to the exciting stuff, because not all the technology is necessarily available. This promises to be the hot topic of discussion at the next few 802.3ap meetings as companies grapple with the best options for making this happen.

First, there's the matter of signaling. Participants say the group is leaning toward binary signaling for 10-Gbit/s serial option. In other words, each symbol transmitted will represent a lone zero or one. Other signaling schemes, such as PAM4, transmit multiple characters at a time, so that one symbol could represent 00 or 10; this doubles the amount of data being sent without actually speeding up the electronics (see Alliance Targets High-Speed Backplanes).

Both signaling methods are candidates, but some task force members believe binary will win out because most chip makers aren't using PAM today. "If we went with the PAM route, we all would take longer to produce our products," says Brian Seemann, director of business management for Xilinx Inc. (Nasdaq: XLNX).

Within binary coding, the group faces two options: non-return-to-zero (NRZ) -- the "normal" way to send information -- and the duobinary alternative developed by Lucent Technologies Inc. (NYSE: LU) and pitched for previous standards. Duobinary coding involves sampling each bit twice on the receiving end, as opposed to once for NRZ. Xilinx is pitching a signaling method that can accommodate both, which would save the group one argument.

One unexpected wrinkle in last week's meetings was the information given by proponents of AdvancedTCA (ATCA), the effort to standardize the basics of telecom equipment design (see ATCA Finds More Friends and AdvancedTCA Makes Headway). According to the delegation from Force10 Networks Inc., the ATCA's channel is slightly different from the one the task force had been considering.

The "channel" gets into the esoteric nuts and bolts of electronic signaling, involving concerns such as the attenuation at different frequencies. "The current starting point for the IEEE model is a superset of ATCA [channels]," says Aniruddha Kundu, a principal engineer in Intel Corp.'s (Nasdaq: INTC) communications group. The two versions deal with different trace lengths in different materials. For example, the ATCA model is for regular FR4 boards, while the IEEE model is for "enhanced" FR4, Kundu says.

The difference shouldn't cause any political hangups, but it could take a while to resolve, only because the technology involved is tricky. "Specification of a channel and its interaction with signaling is a very complex process," Xilinx's Seemann says.

— Craig Matsumoto, Senior Editor, Light Reading

Subscribe and receive the latest news from the industry.
Join 62,000+ members. Yes it's completely free.

You May Also Like