Cypress Preps Ethernet-Over-Sonet Chip

It's expected to announce a framer that packs four Gigabit Ethernet links into an OC48

March 28, 2002

3 Min Read
Cypress Preps Ethernet-Over-Sonet Chip

When Cypress Semiconductor Corp. (NYSE: CY) acquired Arcus Technology back in June 1999, it billed the event as "an aggressive push into the telecom/datacom markets." Now, nearly three years later, the company is about to announce the first product to come out of that acquisition.

It may have taken some time in development, but it looks as though Cypress is going to hit all the right buttons with its new chip. Codenamed POSIC2GVC, it will be able to map any protocol onto Sonet, using virtual concatenation (VC) and generic framing procedure (GFP) standards. (For a deeper explanation of VC, see PMC Pushes Sonet Silicon; for more on GFP, check out page 5 of Metro Multiservices Evolution).

These standards allow data traffic to be carried efficiently over the existing core network infrastructure, which is predominantly Sonet. That's a big deal, because carriers are desperately trying to save cash by preserving their existing investments in infrastructure.

Many of the big communications chip makers, including Agere Systems (NYSE: AGR), Agilent Technologies Inc. (NYSE: A), and PMC-Sierra Inc. (Nasdaq: PMCS), are making a big push into any-protocol-over-Sonet products, even though they are trimming product development in other areas (see, for example, Agilent Boosts Ethernet-Over-Sonet).

Indeed, at the Optical Fiber Communication Conference and Exhibit (OFC) last week, Agere announced that it had started volume production of its virtual concatenation framer, called TADM (see Agere Produces Sonet Framer Chip). An Agere spokesperson at the show told Light Reading that the TADM sits on line cards inside Cisco Systems Inc.'s (Nasdaq: CSCO) phenomenally successful ONS 15454 add/drop multiplexer, the box Cisco acquired from Cerent.

If true, Cisco's choice of Agere's chip is an important validation for the new Ethernet-over-Sonet framers.

Cypress appears to be playing catchup with Agere. Its chip started sampling to selected customers two weeks ago, according to Geoff Charubin, director of marketing for the company's datacom products division.

Superficially, the function of Cypress's chip seems similar to that of Agere's TADM: Each packs up to four gigabit Ethernet streams into a single OC48 (2.5 Gbit/s) pipe, using virtual concatention and what's called "oversubscription." There are likely to be substantial differences in the other features of the two chips, but, unfortunately, full details of Cypress's chip aren't available for comparison.

It's worth looking a little more closely at oversubscription -- what makes it possible to squeeze 4 Gbit/s worth of data into a 2.5-Gbit/s pipe. The theory behind it is that not every customer will fully utilize the capacity of its gigabit Ethernet channel. Data tends to come in bursts, so by holding back a burst of data momentarily, it can fit into a lull in the data on another channel. "It's kind of like what airlines do when they overbook planes," says Steve Perna, VP and general manager of PMC-Sierra's optical networking division.

Of course, when planes are overbooked, passengers with tickets sometimes get left behind. In the data world that means dropped packets. For that reason, not everyone is a proponent. "We're trying to provide carrier-class reliability," says Perna. "[Oversubscription] sounds like a good idea, but the implementation is very difficult."

PMC-Sierra's chip, the Arrow 2xGE, doesn't use oversubscription -- it packs the regulation two gigabit-Ethernet channels into an OC48, and uses the remaining space to carry circuit switched traffic.

— Pauline Rigby, Senior Editor, Light Reading

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