Agere Unveils 'Universal' Framer

Agere Systems (NYSE: AGR) today announced a new framer chip that could turn out to be something of a milestone in the development of Sonet (Synchronous Optical NETwork) and SDH (Synchronous Digital Hierarchy) equipment (see Agere Unveils Multi-Rate Framer).
The chip, called the TSOT1610G, breaks new ground in handling multiple data rates -- in fact all of the data rates likely to be needed in a high-end line card, according to Simon Stanley, principal consultant with Earlswood Marketing Ltd. and author of a recent report on Sonet chip developments on Light Reading (see Next-Gen Sonet Silicon).
Specifically, the chip handles a single channel at OC192 (10 Gbit/s), four at OC48 (2.5 Gbit/s), sixteen at OC12 (622 Mbit/s), or sixteen at OC3 (155 Mbit/s). And that’s “as a far as you need to go in terms of integration,” according to Stanley.
The big idea behind Agere's new chip is to make life simpler both for itself and its customers. The chip targets a range of gear including Sonet add/drop multiplexers, digital crossconnects, and multiservice provisioning platforms, and can also be used to connect Sonet pipes into core routers and other Internet Protocol (IP) gear.
Having a single chip that can be used so widely should speed up development time for systems vendors, because they'll only have to grapple with a single software package, according to Rajendra Agrawala, product line manager for the TSOT chip family.
Having one chip for a wide range of applications also means production volumes will be higher, which will enable Agere to drive down prices more quickly. Agere says the part, which will ship in November, is aggressively priced but declines to provide a figure.
Agrawala says the TSOT chip has other attractions. One is transparency, which makes it possible to retrieve the original overhead from a Sonet frame at the end of its journey. This is becoming increasingly important as traffic goes through foreign networks on its way to the final destination.
Other details of the chip include on-board dual-rate SerDes, which allows it to interface directly with backplanes at either 622 Mbit/s or 2.5 Gbit/s, and an on-board grooming fabric for organizing the subcomponents of the Sonet channels.
What the chip doesn't do is integrate CDR (clock and data recovery) into the framer. This is another trend, with Applied Micro Circuits Corp. (AMCC) (Nasdaq: AMCC) and PMC-Sierra Inc. (Nasdaq: PMCS) both announcing framers with integrated CDR. AMCC's product introduction came a few weeks ago, while PMC-Sierra's announcement was today (see AMCC Introduces Columbia Chips and PMC-Sierra Intros Framer).
Without CDR, Agere's chip can only interface directly to optical transponders, which have their own CDR circuits. If pluggable optics are to be used, then a separate CDR chip will be required on the board. It's worth pointing out, however, that neither AMCC nor PMC-Sierra can offer an integrated CDR at OC192 data rates.
A few chip makers have said they have products similar to Agere's TSOT1610G in the pipeline but haven't announced them so far. Startup Ample Communications Inc., for example, has indicated that such a chip is on its roadmap (see Ample Crams in the Ports).
— Pauline Rigby, Senior Editor, Light Reading
www.lightreading.com
The chip, called the TSOT1610G, breaks new ground in handling multiple data rates -- in fact all of the data rates likely to be needed in a high-end line card, according to Simon Stanley, principal consultant with Earlswood Marketing Ltd. and author of a recent report on Sonet chip developments on Light Reading (see Next-Gen Sonet Silicon).
Specifically, the chip handles a single channel at OC192 (10 Gbit/s), four at OC48 (2.5 Gbit/s), sixteen at OC12 (622 Mbit/s), or sixteen at OC3 (155 Mbit/s). And that’s “as a far as you need to go in terms of integration,” according to Stanley.
The big idea behind Agere's new chip is to make life simpler both for itself and its customers. The chip targets a range of gear including Sonet add/drop multiplexers, digital crossconnects, and multiservice provisioning platforms, and can also be used to connect Sonet pipes into core routers and other Internet Protocol (IP) gear.
Having a single chip that can be used so widely should speed up development time for systems vendors, because they'll only have to grapple with a single software package, according to Rajendra Agrawala, product line manager for the TSOT chip family.
Having one chip for a wide range of applications also means production volumes will be higher, which will enable Agere to drive down prices more quickly. Agere says the part, which will ship in November, is aggressively priced but declines to provide a figure.
Agrawala says the TSOT chip has other attractions. One is transparency, which makes it possible to retrieve the original overhead from a Sonet frame at the end of its journey. This is becoming increasingly important as traffic goes through foreign networks on its way to the final destination.
Other details of the chip include on-board dual-rate SerDes, which allows it to interface directly with backplanes at either 622 Mbit/s or 2.5 Gbit/s, and an on-board grooming fabric for organizing the subcomponents of the Sonet channels.
What the chip doesn't do is integrate CDR (clock and data recovery) into the framer. This is another trend, with Applied Micro Circuits Corp. (AMCC) (Nasdaq: AMCC) and PMC-Sierra Inc. (Nasdaq: PMCS) both announcing framers with integrated CDR. AMCC's product introduction came a few weeks ago, while PMC-Sierra's announcement was today (see AMCC Introduces Columbia Chips and PMC-Sierra Intros Framer).
Without CDR, Agere's chip can only interface directly to optical transponders, which have their own CDR circuits. If pluggable optics are to be used, then a separate CDR chip will be required on the board. It's worth pointing out, however, that neither AMCC nor PMC-Sierra can offer an integrated CDR at OC192 data rates.
A few chip makers have said they have products similar to Agere's TSOT1610G in the pipeline but haven't announced them so far. Startup Ample Communications Inc., for example, has indicated that such a chip is on its roadmap (see Ample Crams in the Ports).
— Pauline Rigby, Senior Editor, Light Reading
www.lightreading.com
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