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After losing Nokia, crisis-hit Intel seeks network assets buyer
Nokia is substituting Arm-based chips for Intel silicon in its latest 5G products amid talk of a possible Ericsson takeover of Intel assets.
The Danish developer thinks the field programmable gate array technology it specializes in has had a bad rap and is out to set the record straight.
Field programmable gate arrays, or FPGAs, gained a bad reputation in 2019 when they were identified as a cause of Nokia's 5G woes. Let down by Intel on the supply of 5G chips, the Finnish vendor had fallen back on FPGAs from Xilinx to plug the hole. Alongside rivals using customized silicon, Nokia suddenly had a cost and competitiveness problem. Ever since, it has been working to phase them out.
But for a small Danish developer called Napatech, the perception that FPGAs are always inferior to application-specific integrated circuits (ASICs) is mistaken. With a global workforce of just 100 people, including 65 developers in Copenhagen, Napatech prides itself on being a hub of FPGA expertise. For some applications, FPGA technology can be far more cost-effective than ASICs, insists the company, brandishing details of a forthcoming 5G product to prove it.
Figure 1: Share price performance of Napatech and Nvidia this year (Source: Google Finance)
That product uses FPGAs to run the 5G user plane function (UPF), a part of the 5G packet core responsible for the inspection, forwarding and routing of traffic. In modern-day 5G networks, the UPF can be hosted just about anywhere – in an edge data center, collocated with the radio access network (RAN) or even within a public cloud. But it tends to gobble up server resources. Napatech's solution involves bypassing the server processor and instead running the UPF on a SmartNIC (essentially, a network interface card with added cleverness).
It's a form of what the industry refers to as acceleration, whereby various resource-intensive functions are handled separately from the main processor. FPGA technology is no prerequisite. But when Napatech measured itself against a rival using ASICs, the results were very much in its favor, said Charlie Ashton, Napatech's senior director of business development.
Grabbing the CFO's attention
Napatech modeled a scenario where it was supporting about 50,000 5G users at a single edge data center. Throwing in a series of standard assumptions about traffic patterns, it compared its FPGA-based SmartNIC to the ConnectX-6, an ASIC-based SmartNIC built by Nvidia.
"We looked at users per server and can do about seven times as many, and that gets people's attention," Ashton told Light Reading. "Then we modeled per-user capex and opex over a five-year period – the kind of thing a CFO cares about – and we got about an 80% reduction."
How was there such a dramatic contrast with Nokia's misfortunes? The Finnish vendor, after all, saw its margins contract after it introduced the FPGAs, and its profitability has steadily improved as those have been scrapped.
Ashton agrees that Nokia probably made the wrong choice in selecting FPGAs. But its difficulties stemmed from using them in RAN products. Napatech's use case of the packet core is entirely different.
"The performance of an ASIC is best the day it ships from the fab and does not get any better," said Ashton about the differences between FPGA and ASIC technology. "An FPGA is programmable and so if an algorithm changes or gets updated, or if someone figures out a different way of implementing something, you just upgrade it in software. For certain applications, an FPGA is the right solution."
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Still, he attributes the positive results of Napatech's modeling to the skills of its Copenhagen-based developer team, pointing out that FPGA programming is "really, really, really hard." Among other things, Napatech's experts ensured their code was fully compatible with the application programming interfaces (APIs) within DPDK, a set of open-source data plane libraries.
"The server CPU [central processing unit] only has to look at the first packet and decide what needs to be done with that packet," Ashton added. "All the subsequent packets are handled on the SmartNIC and then traffic runs completely on that. You get much higher bandwidth, and it frees up the CPU to run apps and services, or you can just have a much smaller CPU."
A David vs. Goliath story
The bigger challenge for Napatech, as a small and relatively obscure company, is on the marketing side. Operators like BT do not buy directly from Napatech. Instead, they would deal with server makers and much larger developers of packet core software, such as Cisco or Mavenir.
When Light Reading last caught up with Napatech at the Network X show in Amsterdam, the company was in advanced discussions with players on both the hardware and software sides about integrating its UPF product. Ashton was spotted several times on the stand of Advantech, a Taiwanese maker of servers.
Whatever advantages Napatech can boast, its challenge to Nvidia is very much of the David vs. Goliath variety. Valued at about $334 billion, Nvidia made around $6.7 billion in sales for its July-ending quarter and a net profit of $656 million. Napatech's revenues over roughly the same period were just 35.5 million Danish kroner (US$4.7 million). They dropped from DKK46.4 million ($6.2 million) for the same period last year, and Napatech also swung from an EBITDA profit of DKK8.6 million ($1.1 million) to a loss of DKK6.9 million ($920,000). Broader macroeconomic problems and a slowdown in the chips market were blamed.
But Napatech seems to punch well above its weight. Excluding the hyperscale giants of Amazon and Microsoft, it claimed a 7.3% share of the market for SmartNICs at the end of 2021, putting it ahead of Nvidia, with 3%. If the UPF product takes off, it could "double or triple the size of the company," said Ashton. Slings at the ready.
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— Iain Morris, International Editor, Light Reading
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