Xilinx silicon implants brighten TIP's Evenstar

Some people want their chips customized and unchangeable. Others like to tinker. But the adaptable variety – so-called FPGAs (field programmable gate arrays) – suffered a reputational blow in 2019 when Nokia blamed them for its 5G ills. The costliness of those chips had chewed into its margins, said the Finnish vendor, and upset its competitiveness. It had only resorted to them after an Intel cock-up on the delivery of ASICs (application-specific integrated circuits) and has spent the last couple of years phasing them out.

None of this sounded positive for Xilinx, subsequently identified as the FPGA supplier. But Xilinx has also been adapting. Now part of chips giant AMD, after the completion of a $49 billion takeover in February, it has delved into its cupboards for the best FPGA and ASIC ingredients it can find and mashed them together in what it believes is the perfect wireless blend. The resulting radio chip is "80% ASIC-based," said Gilles Garcia, a senior director at the company's data center and communications group.

It is, specifically, one of the essential components used in radio units, known (deep breath) as a radiofrequency system-on-a-chip digital front end (thankfully shortened to RFSoC DFE). It is already going into a 5G production network in North America and has now been selected for Evenstar, the effort to develop a basic $1,000 radio unit that is being steered by the Facebook-led Telecom Infra Project.

Figure 1: Xilinx's latest radio unit chip has landed a contract for Evenstar.
(Source: Xilinx)

The idea there is to speed up the development of open RAN, a concept largely about improving interoperability so that different vendors can be used on the same radio deployment. In the ideal scenario, an Evenstar radio unit, built by Fujitsu, KMW, MTI, Sterlite or another partner, would be able to function with baseband products developed by entirely different companies.

In theory, Xilinx's RFSoC DFE could be used in more traditional and non-virtualized RAN deployments, but open RAN is probably its best bet for growth. Any business with Huawei has largely collapsed because of US sanctions, while Nokia has named Broadcom, Intel and Marvell as its main 5G chip suppliers. Out of the traditional vendor line-up, that leaves only Ericsson and ZTE, and the former looks focused on in-house ASIC development.

Hybrid approach

The question is whether open RAN becomes big enough to sustain the numerous vendors piling into the market. Dell'Oro, a market-research firm cited by Xilinx, expects it to garner a 15% share of the overall RAN sector by the mid-2020s. At best, this would be around $6 billion in overall revenues, divided between many different players.

But for Xilinx, which made about $3.1 billion in total revenues last year, that is obviously worth targeting, and the Evenstar deal looks potentially important. Currently, it leaves Xilinx as the only standalone RFSoC DFE supplier that has been announced, alongside a multitude of radio unit vendors. It is also an advertisement for a low-cost radio unit that will appeal to operators in emerging markets and less densely populated communities.

"We are very close to that," said Garcia on the $1,000 target for the Evenstar radio unit. Operators can pay eight or nine times that much for mainstream products, according to reports, although such prices tend to be for more advanced equipment. The Evenstar radio is supposed to feature just four transmitters and four receivers – a 4T4R configuration, as it is known in the industry, compared with the 64T64R ones used for high-end units.

The heavier reliance on ASIC technology is clearly intended to address some of the cost concerns about FPGAs, described by critics as "power hogs" previously. Essentially, it means the DFE subsystem, including the DPD (digital pre-distortion) technology, has been tailored to work more efficiently with the power amplifier, another important component of the radio unit. "We can achieve the most efficient use of spectrum with the lowest possible power," said Garcia.

But retaining some programmable logic in the design gives Xilinx's partners a degree of flexibility they would not see with a pure ASIC, he insists. "Those big Tier 1s will continue to do ASICs, but there are so many different flavors of radio that one size cannot fit all," he said.

"Imagine there is a vendor doing its own power amplifier and wanting a special DPD," added Garcia. "It can put that into programmable logic and bypass the hardened block. That is a specific example you can imagine happening if someone has that special-sauce DPD." Xilinx's "hardening" of features along ASIC lines would not have been optional sooner, he says, because the technology was evolving so much.

Figure 2: R&D spending last year in $M (at today's exchange rates)

Here's a larger version of the graphic.
(Source: Companies)

Perhaps the biggest takeaway from this and other RAN chip announcements in the last year is that an increasingly competitive market exists beyond the Tier 1s. Xilinx's RFSoC DFE measures up well on various performance criteria shown to Light Reading. Concern about Intel dominance in the virtual RAN market for baseband chips has receded (if not disappeared) with the emergence of Arm-based rivals.

It's intriguing that research-and-development spending by six big US chip companies involved in RAN development came to about $37.7 billion last year. That was $5 billion more than Ericsson, Huawei, Nokia and ZTE spent.

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— Iain Morris, International Editor, Light Reading