SAN JOSE, Calif. -- Altera Corporation (NASDAQ: ALTR) today announced the shipment of the EP3SL150, the first member of its 65-nm Stratix® III FPGA family. Featuring 150K logic elements and delivering the lowest power consumption of any high-density, high-performance programmable logic device, the EP3SL150 is ideal for a broad range of applications such as high performance computing, next-generation basestations, network infrastructure, and advanced imaging equipment.

“We chose the Stratix III family for its clear performance advantages and significant power savings,” said Thomas Stubitsch, chief architect at XtremeData. “Some of our customers are asking for maximum logic density, while others are asking for the highest double precision floating point performance. The Stratix III ‘L’ and ‘E’ families allow us to offer both.”

Stratix III FPGAs offer both 45 percent lower power consumption and a 25 percent performance advantage over competing solutions. The combination of Stratix III FPGAs and Altera® Quartus® II design software improves productivity as well as performance. For example, in the area of memory interfaces, the Stratix III FPGAs provide designers with the industry’s only fully compliant interface support for the newly ratified JEDEC DDR3 SDRAM standard, including read and write leveling to DIMMs as well as devices.

“We see DDR3 becoming the memory solution of choice for next-generation systems requiring high bandwidth,” said Raymond Fontayne, segment marketing manager at Micron Technology, Inc. “We are pleased to see that Altera’s Stratix III FPGAs provide built-in read-and-write leveling functionality required to allow operation with our DDR3 SDRAM DIMMs and devices.”

Altera Corp. (Nasdaq: ALTR)