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Actel Enhances Libero 659845

Actel offers additional power reduction and simplifies design creation with Libero IDE 8.4

August 4, 2008

1 Min Read

MOUNTAIN VIEW, Calif. -- Actel Corporation today announced new power reduction and design creation enhancements to its Libero(R) Integrated Development Environment (IDE). Giving designers additional power supply options and enabling even lower power consumption, the new Libero IDE 8.4 offers an FPGA core operating voltage range from 1.14 to 1.575 volts for its flash-based IGLOO(R), IGLOO PLUS and ProASIC(R)3L field-programmable gate arrays (FPGAs). Enhancements to the SmartPower analysis tools within the Libero IBE also allow easy comparisons of multiple design scenarios and their resulting power consumption and battery life implications. For rapid and efficient design creation, the Libero IDE 8.4 also allows Actel-created or third-party intellectual property (IP) blocks, user-developed HDL modules, and glue logic functions to be easily combined in an accessible project area.

Fred Wickersham, senior marketing manager for Actel software tools, said, "In a market sensitive to power consumption and design cycle time, we know that software tools are critical to the success of the project. For simple low-power designs or sophisticated processor-based system-on-chip solutions, the new Libero IDE 8.4 dramatically simplifies the design process with easy-to-use tools that identify and reduce sources of power consumption within a design; remove tedious design tasks like writing new HDL code for logic functions; and make connections between the myriad functions on the FPGA or externally."

Actel Corp.

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