Cortina and Xilinx connect at 40-Gbit/s using the Interlaken protocol
January 24, 2007
SUNNYVALE, Calif. and SAN JOSE, Calif. -- Cortina Systems® (Cortina) and Xilinx, Inc. (NASDAQ: XLNX) today announced successful interoperability of the Virtex™-5 FPGA and Cortina’s new CS3477 Ethernet MAC aggregation IC, via the Interlaken protocol. Interlaken, an open specification for high-speed chip-to-chip packet transfers using the latest serial technology, enables component manufactures to scale their devices to 40 Gbps and beyond.
“Designers need maximum interconnect performance and our customers have been asking for technologies like Interlaken to break the bandwidth ceiling imposed by SPI.4,” said Per Holmberg, director of programmable digital systems at Xilinx. “Interlaken leverages the Virtex-5 advanced serial transceiver technology providing 40 Gigabits today with a runway up to 100 Gigabits or more. With Sarance Technologies previous announcement of their IP for our Virtex-5 family, a completely verified solution is available now.”
“This announcement further demonstrates Interlaken’s ability to eliminate bandwidth restrictions and increase performance for communications applications that require the highest possible performance,” said Fred Olsson, Product Manager at Cortina Systems. “We have seen an outpouring of industry support for Interlaken since its launch just a few months ago, and we are very pleased to welcome Xilinx as a member in the Interlaken eco-system.”
Cortina Systems Inc.
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