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ASIC Leader LSI Logic introduces 10 Gigabit SPI-4 Phase 2 core solution
February 26, 2002
MILPITAS, Calif. -- LSI Logic Corporation (NYSE: LSI) today announced the availability of a System Packet Interface Level 4 (SPI-4) Phase 2 intellectual-property (IP) core, targeted for communications and storage markets. System level designs based on the company's SPI-4 Phase 2 core will allow designers to architect their ASICs with verified interoperability, significantly simplifying interface design and reducing time-to-market of high speed networking applications. The SPI-4 Phase 2 core operates up to 800 MHz and allows the implementation of 12.8 Gbps throughput on the system bus. The core has been optimized for use in emerging applications requiring 10-Gbit Ethernet, OC-192 SONET and Packet-over-SONET (PoS). Recently named by IDC as the top vendor in both local area networks (LAN) and wide area networks (WAN) (1), LSI Logic is continuing this success with several SPI-4 Phase 2 designs in development with key industry leaders. "LSI Logic understands that its customers need complete solutions that are scalable, versatile, and reliable," said Tom Sandoval, vice president of LSI Logic Communications Marketing. "Having the SPI-4 Phase 2 core in our rich CoreWare(R) library provides networking system architects the intellectual property they need to satisfy the explosive growth of Gigabit Ethernet and optical networking equipment requirements and has proven critical for helping them manage their increasing time to market pressures." LSI Logic Corp. (NYSE: LSI)
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