Faraday Intros Net Processor

Faraday unveils high-performance NPU with ASIC programmability at low cost

September 13, 2004

3 Min Read

HSINCHU, Taiwan and SUNNYVALE, Calif. -- Faraday Technology Corporation (TAIEX: 3035), a leading fabless ASIC and IP provider, today announced NetComposer-I (NC-I), the first platform ASIC in its NPU structured ASIC platform product line. Faraday's NC-I is the industry's highest performance network processor (NPU) with structured ASIC programmability for layer 4-7 processing, and yet it costs just $20.

"This is a very major milestone for Faraday," said Dr. C.Y. (George) Hwang, Vice President of R&D and Marketing at Faraday Technology. "We have leaped forward into developing application-specific solutions like those of ASSPs, while still remain true to our ASIC business model. The engineering team has done a tremendous job in putting together the NC-I for our customers."

Ever since the late 1990's, semiconductor companies large and small have attempted but failed to develop NPUs to improve the performance of looking very deep into the packets -- the so-called layer 4 – 7 algorithms. Most of these chips have been too complex, too limited, too expensive, or too slow to meet customers' needs. What customers would like are chips which contain 100% of the standard components needed, and yet still have enough ASIC programmability at very low cost. This is exactly what the NC-I promises to deliver.

The NC-I combines a flexible general purpose NPU (similar to Broadcom's BCM1125 family) with the programmable logic capability of structured ASIC technology.

At the heart of the NC-I is a proprietary 500MHz ARMv4 CPU developed by Faraday, called FA626. The FA626 comes with 32KB of instruction and data cache each, and a unified level two (L-2) cache. It also has a separate 32-bit interface for accessing off-chip SRAMs. Surrounding the FA626 are two Gigabit Ethernet ports or three 10/100 Ethernet ports, a dual-mode PCI-X bus interface, a data coherency engine, and a 32-bit, DDR333 memory interface.

Interconnecting these standard components on chip is a very high throughput, QoS aware non-blocking crossbar switch, running at 64-bit and 166 MHz. The crossbar switch provides programmability for system designers to fine-tune the traffic for bandwidth and latency. In addition, there is a smart DMA engine which supports a rich set of features such as "scatter-gather" and "descriptor chaining."

But the most powerful part of the NC-I, and what also differentiates it from all other NPUs, is its structured ASIC capability. Utilizing Faraday's patented Metal Programmable Cell Array (MPCA) structured ASIC, a designer has 0.5 Mbits SRAM, and 1.5 million gates MPCA with which to add in their unique functions. This process would be very similar to custom development of ASICs, except at a much lower upfront cost, and just 30 days manufacturing turnaround time instead of over 100 days for traditional 0.13um ASIC process. With the MPCA, Faraday's customer can basically create a custom-tailored NPU for its unique approaches to deep packet inspection/processing applications.

"The NetComposer family combines the silicon-proven assurance of an application specific standard product (ASSP) with the proprietary advantages of a custom ASIC," said C.J. Liang, Associate Vice President of R&D at Faraday. "We see this as the way of the future, and we intend to develop even more solutions like the NC-I."

Faraday Technology Corp.

Subscribe and receive the latest news from the industry.
Join 62,000+ members. Yes it's completely free.

You May Also Like