Velio Claims Switch Silicon BreakthroughVelio Claims Switch Silicon Breakthrough
Startup's chips promise to delay the deployment of all-optical switches by making electrical core ones more attractive
October 16, 2000
Developments that could end up delaying the deployment of all-optical switches are scheduled to be announced next Monday (October 23) by startup Velio Communications Inc.
Velio will unveil a set of chips designed to prolong the life of optical switches with electrical cores. They aim to enable vendors to build much higher capacity switches of this type than was previously possible -- ones that can handle thousands of OC48 (2.5 Gbit/s) and OC192 (10 Gbit/s) ports and hundreds of OC768 (40 Gbit/s) ports. At present Tellium Inc. has the biggest switch of this type, with 512 ports, although Brightlink Networks Inc. is developing an electrical-core switch capable of handling thousands of ports (see Brightlink: My Switch Is Bigger Than Yours). What’s more, Velio's chips promise to eliminate a major problem of this type of switch -- very high power consumption (see Optical Power Trip).
A lot of carriers are likely to heave a sigh of relief at these developments. For a couple of reasons, many of them aren’t keen on moving to all-optical switches to address their needs for higher port counts. First, all-optical switching fabric is at an early stage of development and is a long way from being considered reliable enough to be used in live networks. Second, all-optical switches can only handle whole wavelengths; they don’t deliver the granularity of switches with electrical cores.
Velio says the key to its breakthrough is the integration of input/output (I/O) functions and the switching fabric in the same chip. This results in a pretty meaty integrated circuit. There are about 1.5 million CMOS (complimentary metal oxide semiconductor) gates and about 1000 pins on a package measuring 1.25 inches square.
Velio’s developments appear to run counter to the general trend among developers of switching silicon (see Network Processors Proliferate). “The notion of putting the I/O on the same chip is the way everyone started out. But now folk are moving away from that. Instead they are breaking things out into smaller and smaller pieces that can be assembled,” says Colin Mick from The Mick Group, a consultancy.
“The big problem with putting your I/O processor on the same chip as the switch fabric is that you lose flexibility,” Mick adds. And by the time Velio develops a chip, market requirements may have moved on.
Velio, of course, doesn’t see it this way; and to understand why, it’s necessary to dig into the details of the four types of device it’s developing. They are:
Serializer/Deserializers (SerDes) They convert signals between low-speed parallel interfaces and high-speed serial connections. Velio is developing versions for 1-gigabit and 10-gigabit Ethernet and Sonet systems. It plans to announce details in December.
Sonet/SDH grooming switches Each device will have an aggregate bandwidth of 180 Gbit/s and will be able to handle 3,456 simultaneous STS1 connections. Multiple devices can be linked together in a multistage Clos architecture to deliver multiterabit performance. Details will be announced in Q1 2001.
Large port-count space switch fabric These are building blocks for optical switches. In a 3-stage Clos architecture, they will deliver an aggregate switching capacity of more than 30 Tbit/s. Details in Q2 2001.
Eye-openers. These are used to remove jitter and other problems and are used throughout system platforms. Details in Q2 2001.
The importance of these developments is best demonstrated by considering the alternative to buying Velio’s 180 Gbit/s Sonet/SDH groomer: designing and assembling a whole system using state-of-the-art 40-gigabit switch chips and other devices from the likes of PMC-Sierra Inc. (Nasdaq: PMCS) and Vitesse Semiconductor Corp. (Nasdaq: VTSS). According to John Jaeger, Velio’s vice president of strategic planning, this would require 14 switch chips and 18 SerDes devices, instead of Velio’s single chip. As a result, it would occupy 25 times more real estate on a PCB (printed circuit board) and consume 15 to 20 times more power, he maintains. PMC-Sierra wasn't available for comment at press time. Vitesse challenges Jaeger's figures but wasn't able to substantiate its side of the argument. But, as Andrew Schmitt of Vitesse points out "It's easy to make such claims when all you are shipping in volume are datasheets."
Velio has tight deadlines to meet for getting its products out the door, and it can't afford to be late. “Our customers have demanded that we are in volume production in less than 90 days from sampling,” says Jaeger. What’s more, new carrier equipment that is already being marketed by some vendors has open sockets waiting for Velio's devices, he says.
Raju Chekuri, president and CEO, founded Velio (then called Chip2Chip) in August 1998. Two signaling experts, Bill Dally, a professor from Stanford University, and John Poulton, a professor from the University of North Carolina, were also founders.
-- Pauline Rigby, senior editor, http://www.lightreading.com
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