Featured Story
Nokia picks Intel man as new boss, chasing AI and US deals
Justin Hotard, who runs Intel's data center and AI business, is to succeed Pekka Lundmark, who is leaving Nokia in an improved shape.
PMC-Sierra adds 1-Gigahertz, single-CPU, 64-bit, MIPS-based microprocessors with multiple I/O interfaces to RM9000 family
October 27, 2003
SANTA CLARA, Calif. -- PMC-Sierra(TM), Inc. (NASDAQ:PMCS) announced the RM9000x1GL(TM) family of highly integrated 1 GHz 64-bit MIPS-based(TM) microprocessors. The RM9000x1GL family of single CPU core microprocessors consisting of the RM9120(TM), RM9122(TM) and RM9124(TM) offer customers I/O interface options such as 3 ports of 10/100/1000 Ethernet MAC, Generic Packet Interfaces (GPI), and PCI or HyperTransport(TM) while operating at under 7 watts. As a result, the RM9000x1GL microprocessors can be used in a wide range of applications such as enterprise routers and switches, network protocol processing and conversion servers, storage systems, DSLAMs and Web servers. The single-core microprocessors can also be used as a high-performance and compact solution for VPN/Firewall and other security applications using either software encryption or an external hardware encryption engine for the highest performance applications.
"The highly integrated 1 GHz RM9000x1GL builds upon our successful RM9000x1(TM) MIPS-based single CPU core architecture providing customers with a low power, low cost solution for applications requiring high connectivity but without dual-CPU processing requirements," said Tom Riordan, vice president and general manager of PMC-Sierra's Microprocessor Products Division. "PMC-Sierra offers the industry's most scalable, stand-alone MIPS-based microprocessors and we are committed to extending our RM5200(TM), RM7000(TM) and RM9000(TM) families with higher integration and performance while maintaining low power."
The RM9000x1GL integrates high-speed memory and I/O interfaces to enable both low latency memory access by the CPU and high bandwidth access by the I/O devices. The I/O interfaces include three Ethernet MACs, PCI or HyperTransport, DDR SDRAM controller, SysAD and a local boot bus:
The three Ethernet MAC interfaces each operate in 10/100/1000 Mbit/s and support industry standard MII (10/100 Mbit/s), GMII (1000 Mbit/s), and TBI (1000 Mbit/s) interfaces to standard Ethernet transceivers. Combinations of these Ethernet MAC interfaces can be bypassed to provide 8-bit, 16-bit, or 32-bit GPI interfaces.
The POS-PHY Level 3(TM) (PL3) and FIFO-like interfaces offer high bandwidth and easy to use interfaces running up to 200 MHz for connecting external packet processing FPGAs and ASICs.
An integrated 32-bit PCI controller provides PCI 2.1 compliant operation at both 33 MHz and 66 MHz.
An 8-bit HyperTransport interface that operates up to 500 MHz DDR.
A 200 MHz integrated DDR SDRAM interface provides 25.6 Gbit/s of memory bandwidth.
The local boot bus provides connectivity to lower speed devices such as boot ROM and Flash.
Operates from 0 to 70 degrees, consuming less than 7 watts of power.
You May Also Like