Three Labs Join on Semiconductors

SCHAUMBURG, Ill.., OAK RIDGE, Tenn., and RICHLAND, Wash. -- Scientists at Oak Ridge National Laboratory (ORNL), Motorola Labs, and Pacific Northwest National Laboratory (PNNL) have entered a cooperative research and development agreement (CRADA) aimed at increasing the speed of future generations of integrated circuits. Together, the scientists will pursue new materials that they believe may overcome a fundamental physics problem that threatens to limit future semiconductor improvements, and for which the semiconductor industry currently has no solution.

For decades, the semiconductor industry has been able to continue increasing the amount of circuitry, or computing power, on a chip while reducing its size - enabling smaller, faster and better electronic products. However, researchers have long known that the industry will eventually hit a wall that will prevent semiconductor designers from achieving additional size reduction.

The problem lies with the current gate insulating material, a layer of silicon dioxide approximately 35 angstroms thick, or the thickness of 25 individual silicon atoms. The silicon dioxide layer "gates" the electrons, controlling the flow of electricity across the transistor. Each time the chip is reduced in size, the silicon dioxide layer must also be proportionally thinned. At the current pace of chip progression, industry experts expect the gate thickness will need to be reduced to fewer than 10 angstroms in the next ten years. Unfortunately, once the thickness is reduced to 20 angstroms or less (anticipated later next year), the silicon dioxide is no longer able to provide effective insulation from the effects of quantum tunneling currents and the devices will fail to work properly. Quantum tunneling refers to the natural tendency of electrons to flow across thin barriers or thin insulators.

To develop an effective gate insulator at a dimension of fewer than 20 angstroms, most industry experts predict the need to develop new materials with a higher dielectric constants (sometimes referred to as high-k materials) that have a higher capacitance for a given thickness. Independent of each other, ORNL and Motorola Labs have been developing just such materials in the form of crystalline oxides on silicon and other semiconductor materials.

"By using crystalline oxides, we're able to eliminate one of the hurdles to continuing the current rate of growth in the semiconductor industry," said Rodney McKee of ORNL's Metals and Ceramics Division. The work of McKee and colleague Fred Walker, addresses the transistor gate - the dielectric layer that controls the flow of electricity through the transistor. "This is a great example of how Department of Energy-funded basic science research could have a significant impact on a major U.S. industry," Walker said.

Motorola Inc.

Oak Ridge National Laboratory

Pacific Northwest National Laboratory