Intel under fire in cloud RAN over general-purpose claims

"Inline" and "lookaside" sound like obscure orders barked at army recruits on formation. As contrasting techniques used in a mobile network, they can seem just as esoteric and largely irrelevant, even to people who work in the industry. Yet the success of one over the other would determine which companies build the foundations of tomorrow's networks. And the company with perhaps the most at stake is Intel.

That's because the seemingly arcane technology battle is really about the viability of general-purpose computing, where Intel makes its billions, in the radio access network (RAN). Today's RAN infrastructure is largely purpose-built with customized silicon, developed by companies such as Huawei and Ericsson. But operators are eyeing common hardware and software platforms for their entire network and IT estates as they try to eke out savings. These virtual or cloud RANs would rely heavily on general-purpose processors, made chiefly by Intel, and allow network and IT resources to be shared. Or so the theory goes.

The big obstacle is a particularly demanding slice of RAN software that processes signals and is usually referred to as the Layer 1 (or L1) part of the stack. General-purpose central processing units (CPUs) of the x86 variety – the architecture defined by Intel – look ill-suited to handling L1 on a busy, advanced network. Even Intel has recognized this. Its solution, originally dubbed lookaside, is to move one or two of the most problematic L1 functions off the CPU and onto a separate chip, typically called an accelerator.

Inline strikes back

But a separate camp believes this is insufficient. It includes Arm, a UK-based licensor of chip designs, along with Marvell, Nvidia and Qualcomm, three US chipmakers that use Arm's blueprints. "Layer 1 is a big problem," said Panch Chandrasekaran, the head of Arm's 5G carrier infrastructure segment. "Over the long term, my bet is that the only way you will see adoption of virtual RAN in general is through inline. Otherwise, I just don't see how you will close the power-efficiency gap."

Inline goes much further than lookaside, shifting all the L1 functions off the CPU and onto a customized chip. It would free up cores, the building blocks of the CPU, for other tasks. But it could also hurt Intel by cutting it out of L1. An operator using an inline accelerator would, by implication, be able to settle for a less powerful and less pricey CPU.

The debate has been complicated, however, by Intel's efforts to integrate the accelerator with the CPU and position this as a third technique. At first, Intel was hosting the accelerator on a separate card that can be slotted into a server. This is how Marvell and Qualcomm always deliver inline, largely because they do not make CPUs and therefore have no alternative. Since changing its approach, Intel has distanced itself from lookaside and has been scathing about card-based acceleration.

Yet its main criticism remains the same – that a solution of this nature would dump L1 out of the open, virtualized ecosystem and back in the old world of purpose-built tech. "If you take Layer 1 now and you put it in a chip that is proprietary with proprietary tools and proprietary capabilities and configuration, then you are not giving all the opportunities to that ecosystem," said Cristina Rodriguez, the vice president of Intel's network and edge group, during a panel at last week's FYUZ event in Madrid. "You can innovate, but you can only innovate from Layer 2 and above."

There is some truth in all this, as even the backers of inline accelerators admit. Nokia, an outspoken cheerleader for that technique, has combined its L1 software with Marvell's silicon and freely admits it would have to rewrite code if it moved to a different supplier. But Joel Brand, Marvell's senior director of product marketing, hits out at the idea that Intel and its architecture are very different.

"It's not that x86 is a standard," he said. "It has the volume and the software community, and it became a de facto standard, but it's not. It's Intel and it's been in the public domain for a long time, so AMD copied it. It's not a standard. There's no such thing as standard silicon. We have tools that are more available or less available."

What Brand calls a de facto standard, others might describe as market dominance. Intel sold about 71% of the server CPUs shipped last year, according to Counterpoint Research, and a further 20% of the market was claimed by AMD, the other big vendor of x86 chips. Their shared architecture could explain how Ericsson, which boasts support for lookaside accelerators, has managed to deploy the same L1 software on both Intel and AMD platforms without the need for an extensive rewrite (or so it claims).

Cloud RAN-specific?

But there is also skepticism that Intel's chips are as general purpose as it makes out. The customized chips used by the likes of Ericsson and Nokia are commonly known as application-specific integrated circuits (ASICs). They are designed to do one thing to a high level and are tightly coupled with software from the outset. At the other end of the scale is a field programmable gate array (FPGA) that offers more of a blank and erasable slate for coders. Two years ago, Intel was describing its lookaside accelerator as an eASIC, a kind of compromise between those varieties. But its integrated accelerator features neither eASICs nor FPGAs, said Rodriguez during a LinkedIn exchange.

This raises the possibility that Intel has now switched to a more customized "chiplet" bonded with the CPU. Rodriguez did not volunteer details or respond to a tongue-in-cheek question asking if Intel had embraced inline accelerators. And Intel's product brief on the latest-generation technology is vague when it comes to the technical specs for vRAN Boost, as the accelerator is named. Yet Brand scoffs at any depiction of it as not customized. "You can't say that vRAN Boost is general purpose," he said.

Brand is not the only apparent critic, either. In a recently published white paper, Nokia writes that "some so-called general-purpose CPUs promoted by some companies for cloud RAN are not actually general-purpose CPUs." While the Finnish RAN vendor does not explicitly identify Intel, it goes on to describe the combo of processors and lookaside accelerators as "cloud RAN-specific." In today's market, only Intel seems to qualify as a provider.

Concern has also emerged in parts of the server community about Granite Rapids, Intel's next-generation technology. Sources indicate this would unite not only the CPU and the accelerator but also the fronthaul connectivity and other features. One source disparagingly referred to it as an "Intel appliance," using the label for customized hardware as opposed to common, off-the-shelf servers.

Intel might have expected sympathy for its argument that offloading L1 functions to someone else's customized chip, using proprietary code, is at odds with virtualization. Unfortunately, hardly anyone seems to agree. Red Hat and Wind River, Intel partners and prominent developers of cloud-management platforms, have both said inline is compatible with virtualization.

But far worse for Intel is the growing tendency of the hyperscalers – Amazon Web Services (AWS), Google Cloud and Microsoft Azure – to move specific workloads off CPUs and onto customized silicon. A generative AI-fueled splurge on Nvidia's graphical processing units (GPUs), also now an option for L1 acceleration in the RAN, is the most obvious manifestation of this trend. At this year's Mobile World Congress, AWS demonstrated support for a cloud RAN deployment mixing its Arm-based Graviton CPUs with the inline accelerators built by Marvell and Nokia. Intel had no role whatsoever.

Arm now dangerous

And the latest threat to Intel comes from telco interest in such Arm-based CPU alternatives. At FYUZ, Vodafone announced plans to have a commercially available Arm server ready by this time next year. "I know Ericsson and Nokia and Samsung are all paying attention to this because they really want competition to Intel," said Santiago Tenorio, Vodafone's network architecture director.

This should hardly be a shock. Open RAN is supposedly about fomenting competition, and yet Intel claimed a 99% share of all virtual RAN deployments at the start of this year. Arm's Chandrasekaran believes the combination of Arm-based CPUs such as Graviton with inline accelerators will offer a massive improvement over x86 with lookaside.

Operators, though, seem undecided on the performance benefits of one acceleration technique versus the other. And Intel's failure to crack the smartphone sector that Arm dominates is mirrored by Arm's well-documented struggles in server CPUs. Intel has reasonably noted that Arm does not produce chips and that one licensee's products are likely to be quite different from another's. Such variations could make nurturing an ecosystem even harder. Success in virtual RAN is certainly not guaranteed.

Yet circumstances are much better than they were, insists Chandrasekaran, thanks partly to the involvement of the hyperscalers. "Right now, 48 of the top 50 AWS customers are on Graviton," he said. "Draw your extrapolations from that on the software ecosystem readiness."

Another criticism leveled at Arm is that its chips are not only less power-hungry but also less powerful. The point was recently made by Ericsson, eager to see an Arm-based CPU capable of handling most L1 functions via the lookaside approach. But the Swedish vendor is encouraged by a recent architectural update. Thanks to the inclusion of a library called SVE2 – akin to Intel's AVX-512 instruction set – this would allow Arm chips to do vector processing and boost capacity, said Matteo Fiorani, the head of Ericsson's cloud RAN product line.

Like almost everyone else, Intel makes hardly anything in virtual RAN today. Indeed, Joe Madden of analyst firm Mobile Experts estimates it generated as little as $100,000 in revenues last year. The future market, though, should be worth much more. And while the RAN sector is overshadowed by the PC and data center markets, a loss on the fringes of Intel's territory could bode ill for the core.