Agilent to Demo 32G Tester

SANTA CLARA, Calif. -- Agilent Technologies Inc. (NYSE: A) today announced it will demonstrate a 32-Gb/s bit error ratio tester with four-tap de-emphasis at the Optical Fiber Communication Conference and Exposition (OFC) and National Fiber Optic Engineers Conference (NFOEC), March 19-21, at the Anaheim Convention Center (Booth 2719), in Anaheim, Calif.A new era of data-center infrastructure enabling cloud computing, big data and analysis is driving the development of new high-speed data transfer standards such as 100-Gb Ethernet and 32-Gb Fibre Channel. The higher speeds create new testing challenges for designers of servers, network interface cards, backplanes and communication ICs. That’s because quality degrades when signals are transmitted over backplanes, printed circuit board traces and long cables.To address the issue, Agilent has created remotely mountable pattern-generator heads for use with its N4960A BERTs (bit error ratio testers). The new pattern-generator heads (N4951B Option D32 and Option D17) feature integrated four-tap de-emphasis (one pre-cursor, two post-cursors) operating up to 32 Gb/s, which provides designers with the signal compensation required for transmitter emulation when they characterize receivers and systems.Agilent Technologies Inc.