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Deutsche Telekom's 'open RAN' plan slips after Huawei reprieve
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Embeds 16 multirate 3.125-Gbit/s SerDes channels in standard CMOS
August 21, 2001
PALO ALTO, Calif. -- Agilent Technologies Inc. (NYSE:A) today announced breakthrough resultsin a recent application-specific integrated circuit (ASIC) that provide anew level of input/output (I/O) performance and integration in a CMOS(complementary metal oxide semiconductor) process. The announcement confirmsAgilent's ability to integrate 16 multi-rate serializer/deserializer(SerDes) channels operating up to 3.125 Gb/s on a single CMOS chip. Incomparison, the current industry benchmark is only four channels per chip. "Successfully demonstrating this level of embedded SerDes integration at3.125 Gb/s affirms Agilent's leading communications ASIC capabilities," saidMartin Scott, manager of Agilent's Network Products Operation. "Our ASICtechnology continues to push the limits of high-performance, cost-effectiveequipment at the heart of tomorrow's networks." Agilent Technologies Inc.
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