Analog PLL timing chip from Zarlink surpasses performance requirements for OC192 optical line cards

August 6, 2003

3 Min Read

OTTAWA -- Zarlink Semiconductor (NYSE/TSX:ZL) today unveiled a high-performance analog PLL timing chip for optical line cards operating at up to OC-192 (Optical Carrier level 192) rates. With six output clocks more than any competing product and jitter performance that surpasses industry specifications, the ZL30414 device simplifies line card design and lowers space requirements.

Analog PLLs perform timing and synchronization functions in communications equipment, including SONET/SDH (Synchronous Optical Network/Synchronous Digital Hierarchy) line cards used in network core, metro, edge, and access equipment. Zarlink's flexible ZL30414 analog PLL accepts one clock signal and simultaneously outputs six low-jitter, higher- frequency clocks.

"At OC-192 rates, jitter performance is a leading design parameter," said Darren Ladouceur, marketing manager, Timing and Synchronization, Zarlink Semiconductor. "Our ZL30414 device beats industry jitter specifications, and by providing six output clocks at three different frequencies, delivers cost and footprint improvements."

With the ZL30414 device and the ZL30406 chip introduced in May 2003 Zarlink now offers analog PLLs for SONET/SDH line cards operating at rates from OC-3/STM-1 to OC-192/STM-64 (Synchronous Transport Module level 64).

Zarlink is the only company in the industry with a comprehensive range of analog, digital, and module timing devices, and now offers reference designs that help customers determine their requirements and implement system-level timing and synchronization solutions.

Jitter is a short-term variation in clock timing caused that is produced by unwanted noise from various sources, such as various sources, such as from the power supplies, and thermal noise form other components. Noise y or thermal noise from other components. Ncan creates an undesirable broadening of the clock signal, making it difficult for the receiving equipment to discern the original signal, which can in turn can cause data errors.

Ultra-low jitter, measured in picoseconds (trillionths of a second), is crucial in systems operating at high speeds, or frequencies. For systems operating at OC-192/ and STM-64 systems ratesoperating at 10 Gb/s (gigabits per second), the jitter budget the amount of timing variation allowed from various sources is extremely small, making the performance of timing devices critical.

The jitter performance of the ZL30414 analog PLL easily meets Telcordia and ITU-T (International Telecommunications Union-Telecommunications) requirements for OC-192/ and STM-64 systems. The chip's jJitter performance is 0.52 ps (picosecondss) rms (root mean square), providing significant margin against Telcordia's GR-253-CORE jitter requirement of 1 psicosecond rms. As well, the ZL30414 device delivers a maximum peak-to-peak jitter performance of 6.95 ps, surpassing ITU-T G.813 Option 1 and 2 requirements for a maximum peak-to-peak jitter performance of 10 ps for STM-64 rates.

ZL30414 analog PLL interfaces directly to line card components The ZL30414 device accepts one input reference clock at 19.44 MHz (megahertz) and provides six output clocks: four differential LVPECL (low voltage positive emitter coupled logic) clocks at 622.08 MHz the most common frequency for OC-192/STM-64 devices; a differential CML (current mode logic) clock at 155.52 MHz; and a 19.44 MHz CMOS (complementary metal oxide silicon) clock.

The four LVPECL clocks interface directly to such line card devices as framers, mappers, and SERDES (serializer/deserializer) chips. By providing the logic level required by these devices, the ZL30414 analog PLL eliminates the need for glue logic typically fan-out and logic conversion chips which is required when using most competing products. Glue logic leads to a more complex design, consumes power, increases design footprint and cost, and adds to the jitter budget.

The ZL30414 device is in volume production. The chip is offered in a 64-pin TQFP (thin quad flat pack) measuring 10 mm (millimeters) by 10 mm. In quantities of 1,000, the ZL30414 is priced at US$55.84.

Zarlink Semiconductor Inc.

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