Comms chips

Xilinx Moves to 10-Gig

Xilinx Inc. (Nasdaq: XLNX) is kicking its speed up to 10 Gbit/s, hoping to give its field programmable gate arrays (FPGAs) a more prominent role on line cards.

Today, the company unveiled plans to send 10-Gbit/s signals across its largest FPGAs by year's end -- quite a feat, considering other companies' digital logic can't handle more than 3.125 Gbit/s.

Note that we're talking about digital logic chips here -- these gizmos flip ones and zeros to do important work, like downloading the trailer for The Matrix: Reloaded (or, for slower connections, something like this). Analog chips can produce 10-Gbit/s signals, but when the signal heads into a silicon-based logic chip, it gets throttled down to 3.125 Gbit/s or less.

It's not so shocking that Xilinx is creating such an advanced chip. Programmable logic chips have been the drivers of cutting-edge semiconductor technology in recent years, with Xilinx and rival Altera Corp. (Nasdaq: ALTR) helping to develop advanced manufacturing techniques for, respectively, foundries United Microelectronics Corp. (UMC) (NYSE: UMC) and Taiwan Semiconductor Manufacturing Company (TSMC) (NYSE: TSM).

FPGAs are important because of their programmability; they come as a grid of logic gates ready to be customized by a systems company... like a blank chalkboard waiting for a scribbler.

On line cards, FPGAs are useful for translating between protocols, something that came in handy in the early days of network processors, when standard interfaces hadn't been established. Xilinx's Virtex series of large FPGAs were frequently used for the relatively slow-speed duty of communicating between network processors and control-plane processors.

But as Xilinx's on-chip transceivers have sped up to 3.125 Gbit/s, the Virtex has become a data-path player as well. "Customers started to integrate a lot of the functionality of the framer or the MAC [media access controller] onto the FPGA," says Per Holmberg, Xilinx director of marketing.

Xilinx is hoping to continue that trend with the 10-Gbit/s RocketIO transceiver, which will be embedded in the Virtex-II Pro X FPGA that Xilinx announced in March. The Virtex-II Pro X isn't due to ship until the fall, and Xilinx won't discuss RocketIO details until then. One key metric will be how far RocketIO can drive a 10-Gbit/s signal, as that could determine the transceiver's usefulness in driving backplanes.

Xilinx also announced a standalone transceiver today, called RocketPHY -- a rare non-FPGA device for the company. RocketPHY is a 10-Gbit/s transceiver as well, built in CMOS, but it's targeted at driving optical modules, meaning it will only have to send signals a short distance.

RocketPHY comes in three versions handling different permutations of Sonet, Ethernet, and Fibre Channel. The chips are sampling now, with volume production scheduled for the fourth quarter of this year.

Xilinx first talked about its serial 10-Gbit/s CMOS technology in February (see Xilinx Touts 10-Gig Breakthrough). It comes from the November 2000 acquisition of RocketChips Inc., a startup small enough that Xilinx didn't have to disclose the price. Since then, Holmberg says, RocketChips has become the core of a 70-employee team working on transceivers.

— Craig Matsumoto, Senior Editor, Light Reading
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