SAN JOSE, CA -- Xilinx, Inc. (NASDAQ:XLNX) today announced the availability of enhanced 1 and 10 Gigabit Ethernet MAC intellectual property (IP) cores for Virtex-II Pro platform FPGAs, providing end users with flexibility to choose an interface best suited for their target applications.Leveraging its Rocket I/O technology with embedded features such as 8B/10B line coding and channel bonding, Xilinx has upgraded both the 1 Gb and 10 Gb Ethernet MAC cores to provide designers with a gigabit serial interface option. Furthermore, both cores offer an enhanced network management feature set that includes support for programmable interframe gaps, EtherStats-based statistics, and maximum size jumbo frames. Xilinx will discuss the features of the 10 Gb Ethernet MAC core in detail at Programmable World 2002 scheduled for April 17, 2002."To support the growing need for higher bandwidth, designers of high-end networking and telecom systems are moving from parallel to serial interfaces for their next generation designs,” said Mark Aaldering, senior director of the IP Division at Xilinx. "Leveraging the Virtex-II Pro Rocket I/O technology, Xilinx is positioned to lead the migration to serial connectivity standards and speed the delivery of enhanced Gigabit Ethernet cores to our customer base and helping them to get their leading-edge products to market quickly.” Xilinx Inc.