Unveils PaceMaker, an integrated traffic manager and SAR engine chip, and TeraStream, a terabit switch fabric

September 11, 2001

3 Min Read

Camarillo, Calif. -- Vitesse Semiconductor Corporation (NASDAQ:VTSS) announces general sampling of the PaceMaker 2.5, the pin-compatible successor to the PaceMaker 2.4 OC-48 Traffic Management and SAR engine available since 1Q'01. In addition, a leading Vitesse PaceMaker customer comments on the effectiveness of the PaceMaker family for a core networking application. "Networking manufacturers rapidly embraced PaceMaker 2.4 as it was the first-available integrated OC-48 traffic management and SAR solution," said Dr. Raif Onvural, vice president of Vitesse's Multi-Service Solutions Group. "Today we are happy that leading customers in various market segments - including multi-service core switches, core routers, and metro switches - are using and endorsing the PaceMaker family. We look forward to continuing to serve them and other OEMs by providing advances in features, throughput and integration levels in our upcoming products." As with the PaceMaker 2.4, the pin-compatible PaceMaker 2.5 allows for simultaneous independent control of up to 256k traffic flows. Traffic policing, scheduling and shaping are provided to allow equipment and network designers to balance congestion control with quality of service and class of service (CoS) constraints for a variety of access, metro and core network applications. PaceMaker 2.5 adds several new features, including Weighted Random Early Detect (W-RED) and Deficit Round Robin (DRR) scheduling. PaceMaker 2.5 also adds support of per-logical-port backpressure from the switch fabric interface, which maximizes system throughput. The PaceMaker 2.5 is designed to work in combination with Vitesse framer/mapper devices, switch fabric components, and the Vitesse Monitor 4.8 (VSC2450), an Operations, Administration and Maintenance (OAM) device with protection switching capability. Together, the Vitesse components provide system designers a complete end-to-end chip level solution for next generation Internet infrastructure equipment. In a separate release

Camarillo, Calif. -- Vitesse Semiconductor Corporation (NASDAQ:VTSS) today released technical details for its third generation Intelligent Switch Fabric, the TeraStream chipset. TeraStream extends Vitesse's switch fabric product portfolio to serve the high-end metro and core equipment markets. Five out of the top six network equipment vendors have chosen the Vitesse switch fabric solution for their next generation systems. This feature-rich chipset supports OC-48 and OC-192 port speeds with a maximum aggregate user bandwidth of 160Gb/s. TeraStream is the newest member of Vitesse's ubiquitous switch fabric platform, joining the successful GigaStream and CrossStream products to bring over 50 design wins to this family. This highly integrated chipset incorporates fabric functionality into two components, the VSC871 Queuing Engine on the line card, and the VSC881 Packet Exchange Matrix on the switch card, providing the industry's highest level of integration for designers of switches and routers. The Queuing Engine device communicates entirely in-band with the Package Exchange Matrix device via integrated SerDes. This eliminates the need for any additional components and simplifies system design. As compared to other switching solutions, TeraStream provides all of the fabric functionality including queuing, scheduling, SerDes, backplane communication, full redundancy, and optimized switching in only two ICs. A fully redundant 160Gb/s system only requires 24 TeraStream chips, 16 on the line cards and 4 per switch card, versus a typical switch fabric implementation of more than 200 chips. With the industry's lowest component count implementation, Vitesse's TeraStream product provides the lowest overall power and cost solution. "For many networking system designers, the ability to build a high port density switch fabric that offers true non-blocking performance for a broad array of transports and protocols will remain a key first step to create the next generation of intelligent edge and core systems that will be deployed in the market," said Sean Lavey, an analyst with IDC. "Increased usage of highly integrated merchant switch fabric chipsets, in order to reduce the time of designing these multi-service systems, will continue to be a growing trend in the future, especially as network OEMs migrate away from ASIC based architectures and focus on other areas of the system where its differentiation is more valued." Vitesse Semiconductor Corp.

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