Can deliver up to 3.125 Gbit/s over eight full-duplex lanes for an aggregate 50 Gbit/s on a single device

January 22, 2001

4 Min Read

SAN JOSE, Calif. -- Velio Communications, Inc. today announced a complete family of high-performance, low-power SerDes (serializer/deserializer) backplane transceivers, which can deliver up to 3.125 Gbps over eight full-duplex lanes for an aggregate 50 Gbps on a single device. The octal 3.125 Gbps SerDes device consumes two watts of power - less power than quad 1.25 Gbps SerDes devices shipping today. Velio offers a compelling intra-system signaling solution for designers of high-performance networking equipment, such as 10 Gigabit Ethernet systems and OC-192 SONET/SDH optical systems, as well as SAN systems built around the Infiniband and Fibre Channel standards.

"The ability to incorporate robust and low power 3.125 Gbps serial links is critical to the success of large scale networking equipment designs;" said Haluk Aytac, marketing director at Velio. "We are happy to report that our 3.125 Gbps SerDes devices remove the anxiety associated with building systems using these leading edge building blocks."

Target Customers Offer Market Validation

"Power consumption of today's integrated circuits has become the variable that most often limits the density and hence capacity of today's networking products," said Dan Klausmeier, vice president and CTO, CIENA Corporation, Core Switching Division. "Velio is one of the few networking IC vendors that is taking this issue seriously as evidenced by the remarkably low power of their SerDes device."

"We welcome Velio's offering of low power, high port count SerDes products," commented Tom Cassa, Vice President of Engineering of Tellium, "the cores in these devices are key building blocks of multi-port IC's that will enhance next generation switch equipment designs."

Based On Velio's Gigacores

The VC1000 family of SerDes is the first product family announced by Velio. Based on standard 0.18 micron CMOS process, this family includes quad and octal lane versions with throughput performance ranging from 1 Gbps up to 3.125 Gbps full duplex, and low power consumption. The serial cores inside the SerDes consume 100 mW of power for a transmit and receive lane pair.

The VC1000 products are based on Velio's multi-patent pending Gigacores, which are robust multi-gigabit rate mixed signal serial I/O cores that have been in development by Velio's signaling experts, led by Dr. Bill Dally, Velio's chief technology officer and Dr. John Poulton, Velio's chief circuit designer.

"The most common approaches to CMOS serial link design works well with a few channels but face difficulties at high levels of integration because of large areas, excessive power, and jitter caused by crosstalk or injection locking between timing circuits," said Dr. Dally. "We have designed our high-speed I/O cores from the ground up to facilitate high levels of integration by using novel techniques to achieve very low power and immunity to timing noise. Our I/O cores are also designed to improve system noise margins and BER by providing equalization, transition time control, precision on-chip terminations, and very sensitive receivers."

Pre-emphasis is one of the most significant features of the Gigacore technology. This technique compensates for the frequency dependent loss of the printed circuit board, and is fully adjustable. The robust, low power serial I/O cores are enabling Velio's chip designers to pursue a roadmap of very large port count switch devices.

VC1000 Family

The VC1000 family of SerDes consists of five devices in two packages. The Octal devices are packaged in a 25 mm, 380 pin thermally optimized BGA. The Quad devices are packaged in a 17 mm, 220 pin BGA.

VC1003 is a 3.125 Gbps 8-lane Octal and the VC1013 is a 3.125 Gbps 4-lane Quad device, both targeted for 10 Gigabit Ethernet and backplane applications. Under typical load conditions, the VC1003 Octal consumes only 2.1 watts of power.

VC1002 is a 2.5 Gbps 8-lane Octal and the VC1012 is a 2.5 Gbps 4-lane Quad device, both targeted for SONET and Infiniband backplane applications. Under a typical load, the VC1002 Octal SerDes consumes only 1.9 Watts of power, which is an eighth of comparable solutions targeted at SONET applications.

VC1001 is a 1.25Gbps 8-lane Octal SerDes targeted for Gigabit Ethernet and backplane applications. The VC1001 Octal consumes only 1.5 watts under typical load conditions. This is one third of the power consumed by currently shipping devices at this data rate. VC1001 enables the next generation of Gigabit Ethernet switches that require higher port densities while containing power requirements. VC1001 also enables redeployment of existing backplane designs that are consuming a great deal of power and have limited signal integrity support.

Availability And Pricing

The Velio SerDes family began sampling in December 2000, and evaluation boards are available now. Production quantities of the devices are available next quarter. Pricing of the VC1003 Octal 3.125 Gbps SerDes starts at $136 per 1,000 units.

http://www.velio.com/corporate/corporate_pr.html

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