SAN FRANCISCO -- TriCN, a leading developer of intellectual property (IP) for high-speed I/O interface technology, today announced its SPI-4.2 Dynamic Alignment technology can be deployed to support three different OC-192 interface standards: Network Processing Forum Streaming Interface (NPFSI), SONET Framer Interface (SFI-4.1), and Common Switch Interface (CSIX). TriCN currently has customers for the product, which is available in TSMC’s 0.18um and 0.13um process. “Our goal in developing our SPI-4.2 Dynamic Alignment solution was to produce IP that was modular enough to offer a range of specific interface applicability, while also delivering the very highest throughput performance available in the market,” said Ron Nikel, CEO and Chief Technology Officer of TriCN. “Interface specific design is the essence of TriCN’s product approach. Our SPI-4.2 solution exactly fits the needs of chip producers implementing a high-speed NPFSI, SFI or the SPI interface.” TriCN’s System Packet Interface (SPI-4.2) is a fully digital SerDes solution that consists of a transmitter hard macro (TriDL-SPI4-T), a receiver hard macro (TriDL-SPI4-DR) and SPI-4 low-voltage differential signaling (LVDS) I/O's. These interface macros and input/output (I/O) solutions provide up to 1.5 Gb/s per pin and 24Gb/s aggregate data rates, to meet even the most aggressive throughput requirements. TriCN Inc.