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Comms chips

Switch Fabric Chips Rewrite the Rules

In the drive to encourage developers of routers and packet switches to stop developing their own ASICs and start using off-the-shelf silicon instead, network processors have garnered most of limelight, while switching fabric chipsets have languished in the shadows.

That, however, could be about to change, as a Light Reading Webinar (online seminar) on the topic will make clear tomorrow. (Click here to register.)

The Webinar, entitled "Packet Switch Chipsets: Making the Connection" identifies next-generation switching fabric architectures. It also notes that the market is becoming crowded with startups, making it appear that consolidation is inevitable.

Startups already on the scene include Dune Networks, Sandburst Corp., Tau Networks Inc., TeraCross Ltd., Zagros Networks Inc., and ZettaCom Inc.. Even more startups are waiting quietly in the wings, possibly a bit gun-shy about the tsunami of hype that took down several network processor startups.

And there are signs that the major switch players are listening. Zettacom is on the verge of announcing design wins with two Tier 1 vendors, says Paul Liesenberg, Zettacom's vice president of strategic marketing.

The thesis behind many new switch fabrics is that existing switching architectures aren't suited for the growth that routers and switches are expected to exhibit in both line speeds and number of ports. Capital spending might be down at the moment, but it's the switch fabric that dictates much of a system's architecture. Therefore, the argument goes, anybody looking to build new boxes for the recovered economy had best look into new switching methods today.

Another consideration is increased attention to granularity in switching. With most industry activity concentrated at the network's edge, it's become paramount to sort and prioritize traffic by user -- but that means more queues in the system and more decisions for the switch fabric to handle.

As a result, competition in switch fabrics won't be determined by speeds and port counts, metrics that are becoming similar for all competitors.

"What's really different is how people handle the scheduling and arbitration," said Wade Appelman, vice president of marketing at Zagros. "The algorithms that are used in the crossbars today do not deliver the bandwidth guarantees in order to allow delay-sensitive applications to be delivered today."

In Zagros's case, that problem is solved with a new type of arbitration algorithm, one that tracks the data flow at each ingress and egress chip, comparing what's going on to the amount of bandwidth reserved for a particular port. TeraCross likewise tackles the arbitration algorithm with a proprietary algorithm that schedules groups of packets at a time, giving the switch fabric time to consider which packets share a destination or which ports are about to be overloaded.

Cost is also an issue. As with network processors, switch fabrics are hoping to attract equipment vendors that would otherwise have to spend two or three years perfecting an ASIC for their own use.

"It makes sense cost-wise," says Zettacom's Liesenberg. "Deployments are very aggressive now. They used to have three years to get a system out. Now it's more like 18 months."

Chip vendors hope all these factors add up to a reason for OEMs to abandon the ASIC designs they've held dear for so long. "The merchant selections even two years ago weren't really adequate to buy off for systems OEMs," in terms of feature sets, says Kirby Nell, Zagros's senior systems architect. "As the industry makes the shift, we'll start to see these in-house design wins start to move to merchant silicon."

— Craig Matsumoto, Senior Editor, Light Reading
www.lightreading.com

On Tues., Nov. 12, Light Reading will focus on packet switching in a Webinar entitled "Packet Switch Chipsets: Making the Connection." For more info and to register, click here.

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