The same virtual RAN software deployed on Intel chips can now be used on AMD silicon as well, says Ericsson.

Iain Morris, International Editor

April 27, 2023

6 Min Read
Ericsson boasts 'open' portable RAN, adding AMD next to Intel

Silicon constraints feature high on the list of things that bother telco technology executives when it comes to open and virtual radio access network (RAN) technology. Despite years of talk about hardware and software separation, they remain tightly coupled in this part of the network. As Germany's Deutsche Telekom phrased it in a recent white paper, "open RAN solutions remain highly dependent on the chosen hardware."

It may surprise parts of the industry, then, to hear Ericsson – a big kit vendor sometimes portrayed as an open RAN opponent – claim its latest RAN software can be deployed on multiple silicon platforms. Ericsson had previously hooked up with Intel in this virtual RAN space, advertising software that would run on the chipmaker's Xeon-branded general-purpose processors (GPPs) instead of its own custom silicon. After successful trials around the time of Mobile World Congress (MWC) in February, it now has a partnership with AMD, Intel's biggest GPP rival, as well.

Figure 1: Ericsson's booth at this year's Mobile World Congress. (Source: Matthias Oesterle/Alamy Live News) Ericsson's booth at this year's Mobile World Congress.
(Source: Matthias Oesterle/Alamy Live News)

That means the same Layer 1 software – the part responsible for baseband processing in a RAN – can be deployed on either Xeon chips or AMD's EPYC processors. This would not be doable if Ericsson had built its software on top of FlexRAN, a Layer 1 reference design from Intel that works only with Intel's chips. Instead, Ericsson says it has developed its software from the ground up to ensure there is full portability.

All that comes partly in response to feedback from operators determined to avoid being tied to one platform, said Freddie Södergren, the head of technology and strategy for Ericsson's networks division. "In general, providing choices and making sure that our cloud RAN is multiplatform is something we think is very important and of course it is fundamental to the open RAN and scale," he said. "It's definitely something we hear customers talk about."

The great virtual RAN schism

But there are some big caveats, and signs of a religious divide opening between Ericsson and Nokia in this area. Layer 1 processing places a considerable demand on the underlying silicon, and GPPs by their very nature were not designed for it. To overcome their limitations, equipment vendors offer hardware accelerators – dedicated silicon – to handle some of or all these Layer 1 functions. The religious divide is over the type of acceleration used.

Nokia has recently thrown its weight behind a system called "inline" acceleration, which places minimal reliance on the GPP (or CPU, for central processing unit) for any Layer 1 activities. With inline, a separate accelerator card is typically plugged into the server. It is favored by chip companies including Mavenir, Nvidia and Qualcomm, all of which produce custom silicon based on the blueprints of Arm.

Based in the UK and known mainly because its technology figures prominently in smartphones, Arm is often cited as a more energy-efficient option than the x86 architecture developed by Intel and AMD. Moreover, at MWC, Tommi Uitto, the head of Nokia's mobile networks division, said all his tests had shown that inline delivers better results than the alternative.

Lookaside, the alternative in question, is Ericsson's preference. Just as the Arm community seems to have coalesced around inline, so has Intel plumped for lookaside. That is hardly a surprise because lookaside attaches greater importance to the GPP, and the market for GPPs is still dominated by Intel (AMD is the one sizeable competitor). With lookaside, only select Layer 1 functions are handled by the accelerator.

Figure 2: Energy efficiency of lookaside versus inline, according to Ericsson (Source: Ericsson, Verizon) (Note: The 1x baseline is based on measurements on a distributed unit workload supporting 600MHz x 4 layers on a single CPU with selected function HW accelerator) (Source: Ericsson, Verizon)
(Note: The 1x baseline is based on measurements on a distributed unit workload supporting 600MHz x 4 layers on a single CPU with selected function HW accelerator)

This is more economical than using an inline accelerator, according to Södergren, and Ericsson was highly critical of inline in a white paper it published last year with Verizon, a major US customer. The drawbacks listed include the need for a separate PCIe card in the server (PCIe is the standardized interface between the card and the server), which, according to Ericsson, drives up cost. With lookaside, accelerators can also be integrated with the CPU for efficiency improvements, the company said.

While the same arguments have been made by Intel before, Ericsson reckons the net effect is to make lookaside (also referred to as a "selected function HW accelerator" in Ericsson's white paper) a more energy-efficient solution than inline (also called a "full L1 accelerator"). A further disadvantage of inline, according to Ericsson, is that it needs software to be developed specifically for a given hardware component, making disaggregation and software portability much harder.

Arm left out

In the case of the virtual RAN software it has developed for use with Intel and AMD silicon, Ericsson and the chipmakers relied on a standard called BBDev. "It's a development kit and allows us to do portability," said Södergren. "Our interface to the accelerator is the same, so we don't have to change anything in code to port between different platforms."

Arguably the main drawback of lookaside is dependency on Intel, given its dominant role as a provider of GPPs. The deal with AMD clearly helps to address that, but Layer 1 software portable to Arm-based accelerators would be even better. That seems unlikely considering Ericsson's apparent opposition to inline, and Sachin Katti, the head of Intel's network and edge group, has recently suggested that portability between x86 and Arm may always be problematic after "decades of investment to optimize software for x86."

Critics will also continue to question Ericsson's commitment to openness. The arrangement with AMD does not mean Ericsson is suddenly prepared to let its RAN software be used with another company's radios via an open fronthaul interface. A spokesperson for Ericsson said there are still concerns about the uplink radio performance for massive MIMO, an advanced 5G technology deemed essential for the industry.

But Ericsson insists it is only a matter of time. "As we see the specification maturing, we will bring this into our portfolio as we previously communicated at our Capital Markets Day," said the company in an email to Light Reading. "With next-generation open fronthaul will also come a possibility to integrate third-party radios." In the meantime, Ericsson and AMD will be under pressure to show their tie-up works outside the lab.

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— Iain Morris, International Editor, Light Reading

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About the Author(s)

Iain Morris

International Editor, Light Reading

Iain Morris joined Light Reading as News Editor at the start of 2015 -- and we mean, right at the start. His friends and family were still singing Auld Lang Syne as Iain started sourcing New Year's Eve UK mobile network congestion statistics. Prior to boosting Light Reading's UK-based editorial team numbers (he is based in London, south of the river), Iain was a successful freelance writer and editor who had been covering the telecoms sector for the past 15 years. His work has appeared in publications including The Economist (classy!) and The Observer, besides a variety of trade and business journals. He was previously the lead telecoms analyst for the Economist Intelligence Unit, and before that worked as a features editor at Telecommunications magazine. Iain started out in telecoms as an editor at consulting and market-research company Analysys (now Analysys Mason).

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