PMC-Sierra unveils dual 64-bit MIPS chip-powered multiprocessor

October 4, 2004

1 Min Read

SANTA CLARA, Calif. -- PMC-Sierra, Inc. (NASDAQ: PMCS) today announced its third generation highly integrated 64-bit MIPS-Powered(TM) multiprocessor at the Fall Processor Forum. Using both PMC-Sierra's proven System-on-Chip (SoC) platform design methodology and 90 nm CMOS process technology, the RM11200(TM) integrates two newly designed 1.8 GHz E11K(TM) CPU cores with multiple high-speed memory and I/O interfaces, including dual DDR2, dual PCI Express(TM), quad Gigabit Ethernet ports, and HyperTransport(TM) (see Figure 1). The RM11200 was designed to provide customers with the highest level of processing performance, low power and leading edge integration for high performance networking, storage and communications applications such as enterprise routers, storage systems and DSLAMs.

"PMC-Sierra has always been regarded as a master in delivering high operating frequency embedded processors, and they've done it once again with this new E11K core. Furthermore, PMC-Sierra has matched this 1.8GHz embedded processor core with peripherals designed to meet the needs of next generation embedded systems, including the DDR2-800," said Markus Levy, industry analyst and president of the Embedded Microprocessor Benchmarking Consortium (EEMBC). "The RM11200 will clearly be the MIPS-based performance leader."

"System designers face multiple challenges when developing high performance equipment, which include balancing the need for high I/O bandwidth, low memory latency, high processing performance and low power," said Steve Perna, vice president and general manager for the Microprocessor Products Division at PMC-Sierra. "The RM11200 uniquely addresses these critical challenges to provide our customers with optimal system performance and low power."

PMC-Sierra Inc.

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