AMD criticizes Intel on virtual RAN 'lock-in,' claiming more open approach

Intel's integrated accelerators come in for sharp criticism from close rival AMD, which says it does things quite differently.

Iain Morris, International Editor

November 11, 2024

7 Min Read
AMD headquarters in Santa Clara
(Source: AMD)

For staff at AMD, the slow death of FlexRAN must be a pleasure to watch. The name evokes openness and adaptability, the image Intel undoubtedly wanted to project when it began developing the reference architecture for a virtual radio access network (vRAN) more than a decade ago. But it seemed to be an epic misnomer. "You've got to bear in mind that FlexRAN locked you in," said Nick Hancock, a director at AMD, Intel's biggest rival in the market for general-purpose central processing units (CPUs). "FlexRAN pinned licensing to Intel on the CPU."

While it was technically feasible to run FlexRAN-based software on AMD's chips, those licensing realities made it commercially impossible. These days, to Hancock's relief, the biggest developers of virtual RAN software have either dropped FlexRAN or avoided it from the outset. "What most of those vendors have found is that by building their own they get better efficiencies and can design a better solution," said Hancock. "And in the process of doing that, they're actually unlocking themselves from any licensing issues associated with it."

But the demise of FlexRAN has not brought an end to the charge that Intel is insincere about openness, jangling a heavy set of jailer's keys to go with some of its latest technologies.

Its original lineup of vRAN products comprised a CPU and an accelerator card. The idea was to put all the RAN software on the CPU except for a troublesome item known as forward error correction (FEC). Too resource-hungry for a general-purpose chip, FEC would be handled by the accelerator, an extra bit of silicon customized for its demanding needs. The approach is often referred to as "lookaside." But in the last couple of years, Intel has retreated from it, focusing instead on a controversial alternative it calls "integrated" acceleration.

When it comes to apportioning functions between the CPU and the accelerator, there is little obvious change (if any). The main difference is that integrated, as the name implies, combines the accelerator with the CPU on the same die. To Nokia, which has criticized the move during interviews, this makes it look like a customized system-on-a-chip (SoC) rather than a general-purpose processor sold under the Xeon brand.  "This is deviating from the mainstream Xeon processor," said Brian Cho, Nokia's chief technology officer for Europe, and a former Intel engineer, during a presentation to reporters at Nokia's facilities in Oulu in late 2023.

'Not a healthy way'

AMD is equally disdainful of Intel's integrated approach. "They chose to integrate it, embedded on the board within the SoC, and we think that's going to be quite limiting," said Hancock. "We think it's going to be limiting in terms of how they scale that, and we think it's going to be limiting in terms of lock-in for customers in not a healthy way – similar to what they've done on the software side with FlexRAN."

By integrating the accelerator, Intel forces customers to adopt a one-size-fits-all approach and makes disaggregation – supposedly an objective of open and virtual RAN architecture – much harder to achieve. This, at least, is the accusation that has flown around. And it is exactly why AMD says it has no plans to develop its own range of integrated accelerator products.

"If you integrate an accelerator, you are using or paying for this accelerator even when you don't need it," said Gilles Garcia, the business lead for the wired and wireless groups at AMD. At the same time, a telco might want to add capacity only for specific functions, according to a separate industry source. If everything has been integrated and accelerator cards are no longer supported, that telco would have to buy a whole new server at greater cost, said that source.

The other big worry is that the nature of this customization becomes a barrier to switching between chip vendors in future. "One of the key messages we hear from our customers is 'don't lock us in,' and the reality of this is that building in hardware features specific to our technology creates huge, huge issues for our customers," said Hancock. "If you're locked into a specific vendor and can't get a consistent feature set, then all of a sudden you're reliant on it."

Card player

Unlike Intel, which has in the last two years been scathing about the use of discrete cards, AMD sounds determined to ensure CPUs and accelerators remain entirely separate. Its lookaside option for customers combines a CPU with a field programmable gate array (FPGA) from Xilinx, a chipmaker AMD acquired in early 2022 through an all-stock deal valued at about $60 billion. That FPGA supports the resource-hungry FEC software.

Whether the accelerator is an FPGA or a more customized application-specific integrated circuit (ASIC), keeping it apart should help software developers to produce less hardware-dependent code for the standalone CPU, deployable on either Intel or AMD chips that use the same x86 architecture, according to Hancock. "We understand there are parts that might be more efficient on a dedicated ASIC or an FPGA, but if we can keep those separated it could be a separate ecosystem," he said. A firm dividing line, essentially, makes it easier for a software vendor to copy and paste the rest of the code from one general-purpose processor to another.

The challenge for AMD is overcoming the somewhat tarnished reputation FPGAs have gained in the telecom sector ever since Nokia's bad experience with them several years ago. Let down by Intel on the delivery of more customized chips, the Finnish equipment vendor resorted temporarily to FPGAs, including products from Xilinx, and watched its 5G profit margins disappear. One telco source, who spoke on condition of anonymity, described them as costly and power-hungry alternatives to ASICs. The only advantage, he said, is that an FPGA, unlike an ASIC, can be updated in the field.

But Garcia, who worked for Xilinx before the AMD takeover, rejects the criticism about using FPGAs in vRAN, arguing that energy consumption is always limited by the PCIe slot, the server socket for an accelerator card. "The slot is 65 watts, and our card is 45 watts," he said. "That's very, very close to what an ASIC can do."

The FPGA can also be configured to handle more than just FEC software, including some artificial intelligence, said AMD's executives. "We've demonstrated both AI and baseband processing on the same card at the same time," said Hancock. "It's a slightly more complex piece of calculus you've got to work out in terms of your initial return on investment."

Different strokes

The main vRAN alternative to this lookaside approach is one favored by Nokia called "inline" acceleration. While lookaside continues to lean heavily on the CPU, inline stumps up custom silicon for all the numerous functions (including FEC) in Layer 1, the category of RAN software that places the heaviest demand on IT resources. Intel has been highly critical, saying there is too much hardware dependency in Layer 1 for inline to be considered a virtual RAN technology.

But AMD has sought to be more accommodating. Several of its partners are now testing an inline option that combines a Qualcomm accelerator card for Layer 1 with an AMD CPU for the other RAN software. Hancock reckons there is still no industry consensus on which option – lookaside or inline – will ultimately win.

Nevertheless, Intel remains the dominant force in a vRAN market that still accounts for just 3% of total RAN expenditure (although 10% of the baseband subsector), according to Remy Pascal of Omdia, a Light Reading sister company. Despite much talk, CPUs based on Arm, a rival architecture, have not emerged as viable alternatives to x86 so far. "Arm has focused mostly on the standalone accelerator piece, rather than the actual CPU or back end, and there's not necessarily such a good fit there," said Hancock. Porting software from x86 to Arm is also "not terribly easy," he said.

This leaves the industry reliant on AMD as the only x86-based alternative to Intel, whose broader business is currently in crisis. Why, then, is there not more sign of commercial activity? "I think the market is getting a lot more subdued on vRAN as a whole," said Hancock. "I still don't think it's proven its value." RAN spending has dropped sharply in the last couple of years. But the market appears to be over the worst of the slump, and Omdia expects vRAN's share of it to grow. Without a parallel AMD advance, that would not look as positive.

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About the Author

Iain Morris

International Editor, Light Reading

Iain Morris joined Light Reading as News Editor at the start of 2015 -- and we mean, right at the start. His friends and family were still singing Auld Lang Syne as Iain started sourcing New Year's Eve UK mobile network congestion statistics. Prior to boosting Light Reading's UK-based editorial team numbers (he is based in London, south of the river), Iain was a successful freelance writer and editor who had been covering the telecoms sector for the past 15 years. His work has appeared in publications including The Economist (classy!) and The Observer, besides a variety of trade and business journals. He was previously the lead telecoms analyst for the Economist Intelligence Unit, and before that worked as a features editor at Telecommunications magazine. Iain started out in telecoms as an editor at consulting and market-research company Analysys (now Analysys Mason).

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