BATH, U.K. -- picoChip Designs Ltd today announced the industry's first High Speed Downlink Packet Access (HSDPA) solution, an extension to the company's recently introduced "3G basestation on a CD" reference design. HSDPA, also referred to "3.5G", is a packet-based mode for WCDMA Release 5 which increases data rates to up to 14Mbit/s for intensive multimedia services and has been heralded as the future of 3G.

Dr Rodger Sykes, CEO, picoChip commented: "All key manufacturers are currently struggling to deliver HSDPA. One of the key strengths of the picoChip offering is the speed of development. The "basestation on a CD" can reduce development time by 50%, which provides a significant deployment advantage to our OEM customers. Furthermore, once picoChip products are used in the field they can be seamlessly updated - saving on "fork lift" upgrade costs and eliminating worries about interoperability or obsolescence."

"Everyone is concerned that the demand for mobile data will out pace revenue growth", stated Jason Chapman, wireless analyst for Gartner. "HSDPA allows operators to dramatically increase the number of higher data rate users on the same radio carrier signal - significantly improving the economics. This has been expected to be a slow development - anything that can accelerate the timeline is significant".

The "basestation on a CD" includes tested algorithms and source code for WCDMA FDD and HSDPA. Current development times for a basestation can be 24 months or more, with budgets of many tens of millions of Dollars: this solution dramatically accelerates development and saves costs. OEMs can be more profitable, more responsive, with reduced time-to-market, while operators will be able to provide advanced services at lower cost and higher profitability and users benefit from faster services.

The picoChip design platform combines a high-performance processor optimised for wireless, with a rich programming environment (using standard ANSI C) and comprehensive system libraries. These allow applications to be easily and efficiently developed, simulated, compiled, verified and tested in a single environment. The picoArray processor is the fastest embedded processor on the market, delivering 300 Giga-operations per second and 30 Giga multiply-accumulates per second - approximately ten times the performance of any other device. In addition to WDCMA FDD and HSDPA, reference designs for TD-SCDMA, 802.16 and other standards are under development. The system is also very appropriate for any other advanced wireless technology, including 4G research and military software defined radio (SDR or JTRS).

The HSDPA reference design platform extension will available in 1Q04 direct from picoChip - email: [email protected].

PicoChip Designs Ltd.