Fujitsu Intros ASICs

AccelArray structured ASIC devices reduce NRE costs via embedded IP macros and standardized layers for basic system circuitry

June 26, 2003

2 Min Read

TOKYO -- Fujitsu Limited today announced the release of the AccelArray(TM) structured ASIC devices that deliver faster, less costly development times through the use of standardized interconnect layers for basic system circuitry and key IP macros embedded in the base master of the architecture. AccelArray ASICs are built on Fujitsu's advanced 0.11-micron process to achieve performance on par with standard cell ASICs in 0.11-micron technology.

These AccelArray ASICs target telecommunications and industrial automation applications, in which product cycles are increasingly compressed and delivering high performance at low prices is a market necessity.

The new chip offers an ideal mix of features, combining the flexibility and fast development cycles of field programmable gate arrays (FPGAs) with the compactness and high performance of standard cell ASICs.

Because the key IP macros are already embedded into the base master, operating speed and performance integrity are assured. Of a total of six interconnect layers, three are standardized layers for basic system circuitry, such as clock trees, leaving only the remaining three to be customized in accordance with the customer's specifications. Compared with conventional standard-cell chips(*1), the streamlined task of customization offered by AccelArray cuts development times by roughly 50% and non-recurring engineering (NRE) costs by roughly 30%.

Use of the company's FAITH(TM)(*2) design consulting service for more efficient chip design ensures a smooth migration from FPGA to the AccelArray platform for volume production. For designs slated for low or medium-scale production volumes, FPGA can be used for sample shipments, and then full-scale production can be implemented in AccelArray at a lower per-chip price immediately after the specification is set, resulting in a faster design and development cycle that makes more efficient use of development resources.

Fujitsu has developed this product especially for telecommunications equipment, to meet its growing demands for shorter product cycles, lower costs and higher performance levels, as well as LSI testers and other industrial automation applications. By delivering high-performance structured ASIC platforms, Fujitsu seeks to expand its position in the high-end FPGA market, building on its strong position in the ASIC field--three years running as Japan's leading ASIC vendor by revenue.

Fujitsu Ltd.

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