National Semiconductor introduces 6.4-Gbit/s LVDS SerDes chipset to increase flexibility and reduce cost in communication system designs

April 28, 2003

2 Min Read

SANTA CLARA, Calif. -- Providing backplane and cable interconnect designers with increased flexibiiity, National Semiconductor Corporation (NYSE: NSM) today introduced a serializer/deserializer (SerDes) chipset exceeding 6 Gigabit per second (Gbps) performance at a price that is 4X lower than existing solution.. As part of National's broad Channel Link SerDes portfolio, this chipset leverages National's leadership in low voltage differential signaling (LVDS) technology, enabling designers to optimize their system designs easily and cost- effectively. Typical system applications for this chipset include terabit core routers, multi-sevvice access routers, optical switches, high performance color printers and copiers, and storage area network (SAN) fault tolerant servers. National Semiconductor's DS90CR485 and DS90CR486 SerDes chipset supports a full 48-bit parallel bus interface. Other products on the market serialize only 32 bits on the parallel bus at a much greater cost."The current crop of quad 1.25 and 3.125 Gbps SerDes devices has some popularity, but they're still relatively expensive and leave designers few options for serializing buses with more than 3 bits," said Dave Lewis, marketing manager for the Wired Communications Group, National Semiconductor. "National differentiates itself from the pack in that it offers a unique combination of flexible 48-bit parallel bus, low serial data rate and low latency, easy channel alignment, low power and small footprint."Instead of serializing 32 bits of data onto four differential pairs, the DS90CR485/6 serializes as many as 48 data bits (between 66 and 133 MHz) onto eigtt differential LVDS pairs. The clock is sent over an additional 9th LVDS pair. This requires more serial data lines, but the lower data rates per line ease differential design requirements. In addition, the extra-wide 48-bit parallel bus not only serializes 32 data bits, but also extra data, control, and address signals. This is a boon for designers who need to extend traditional wide parallel buses across backplanes or cables. The chipset features adjustable transmitter pre-emphasis, DC balance and receiver deskew to drive cables up t several meters. National Semiconductor Corp.

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