Axiowave Queues in the Core

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Sakarabu 12/5/2012 | 1:38:32 AM

re: Axiowave Queues in the Core lotta angst coming from you. your attitude belongs on the yahoo boards.

So, you dump on any start-up that has not closed a deal and also dump on start-ups that has closed multiple deals. sounds like your opinion is worthless.

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indianajones 12/5/2012 | 1:38:26 AM

re: Axiowave Queues in the Core Well, your claim "too cheap to make any money from it" is true if they continue to sell your vision of "cheap high-quality" bandwidth. Then I agree there is no hope.

But if they come up with a service model to support high priority services and charge premium pricing for it, then there is hope.

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arch_1 12/5/2012 | 1:38:26 AM

re: Axiowave Queues in the Core I said:
"Preprovisioned POP-to-POP LSPs fail....
[core QoS requires SVCs, which the current Internet cannot support]"

bobcat replied:

"Sounds like a case for ATM/PNNI in the core and UNI/SVCs at the edge utilizing soft PVCs...Sonet transport for APS and VT concatenation and OAM Nah!!!
Maybe MPLS/LSPs over ATM soft PVCs, and ATM ABR-QOS end to end? Nah!!!!
Wait for the IETF to figure it out.

Any approach (including the one you describe) exposes each SVC to each core router it traverses. SInce a 10Gpbs link can support approximately 1M VoIP calls. and a VoIP has about a 2-minute average duration(?) The Linecard would need 1M states and a setup/teardown rate of 500K/minute or 7K/sec per 10Gbps link.

If we are going to implement a converged service, it should be based on IP/MPLS formatting and forwarding, since that is the native format for the majority of the traffic. The can add control-plane protocol refinements as needed to implement the features that ate actually needed for premium services, without all the garbage from the legacy protocols.

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AllGone 12/5/2012 | 1:38:25 AM

re: Axiowave Queues in the Core I have posted about it this morning but LR censored it. Hyperchip is gone, it's over they are broken, hardware and software teams[80 engineers] have been laid off on May 21, about 40 employees remains trying to sell what's left while Quebec gov. controls last finances.

So as you said Light reading tends to ignore bad news about Hyperchip.

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Truelight1 12/5/2012 | 1:38:23 AM

re: Axiowave Queues in the Core Yep I agree, I'm an angry man, worthless opinion etc..Looking to be proven wrong, not on LR that's for sure.

BTW there are some very good startups out there that never get a mention on LR.

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arch_1 12/5/2012 | 1:38:20 AM

re: Axiowave Queues in the Core It may not actually be a conspiracy of silence on the part of LR. It may simply be that LR cannot monitor every message on every board. I recommend that you send a polite e-mail to
[email protected]
and give Phil Harvey whatever information you feel you can ethically reveal about the situation.

In my opinion, Hyperchip made about the same number of good and bad decisions as most of its peers in the new-start core router business. it was luckier than most. I outlasted everybody but Procket and Caspian, and depending on how you keep score, it may outlast either or both of them, also. Of the three, Hyperchip had a superior fabric architecture and SW architecture, but (arguably) had not executed as well on HW or SW. It's a whole lot easier to fix HW and SW implementation problems than it is to fix architecture.

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networking_legend 12/5/2012 | 1:38:17 AM

re: Axiowave Queues in the Core It's a whole lot easier to fix HW and SW implementation problems than it is to fix architecture.

Its also a lot easier to dream up a sexy architecture on the back of a napkin than it is to actually implement it.

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arch_1 12/5/2012 | 1:38:15 AM

re: Axiowave Queues in the Core I said:
"It's a whole lot easier to fix HW and SW implementation problems than it is to fix architecture."

networking_legend replied:
"Its also a lot easier to dream up a sexy architecture on the back of a napkin than it is to actually implement it."

Very, very true. A bunch of block diagrams labeled "architecture" may help you get funded, but unless real developers refine the architecure, is is merely slideware. Hyperchip actually implemented their architecture, and were well on their way to addressing the remaining HW and SW problems, which were not related to the architecture. The HW and SW teams took a feasible theoretical architecure, and did all of the hard work to turn it into practical architecture and then into a reality.

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whyiswhy 12/5/2012 | 1:38:13 AM

re: Axiowave Queues in the Core "But if they come up with a service model to support high priority services and charge premium pricing for it, then there is hope."

aka Corvis or whatever it/he is calling it/himself these days...???

ROTFLMAO! Dude, if there was ANY business there as a service provider, do you not think the big boys would be all over it like white on rice?

Seriously, good luck to you all. Keep your resumes up to date, and network with contacts in medical, industrial, defense, etc.

-Why

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grow_up 12/5/2012 | 1:37:43 AM

re: Axiowave Queues in the Core I AM QUITE SURE THAT WHEN ALL OF YOU EX-EMPLOYEES WERE HIRED, YOU WERE SINGING A VERY DIFFERENT TUNE. THE PEOPLE WHO ARE WORTH KEEPING ON ARE PROBABLY STILL THERE. THE REST OF YOU SHOULD REMEBER WHAT THE HIGH TECH JOB MARKET IS LIKE RIGHT NOW, AND STOP SPEWING YOUR IGNORANCE TO PEOPLE WHO REALLY DON'T CARE. ONE LAST THING, IF HYPERCHIP NEVER COMES OUT WITH A PRODUCT, ALL OF YOU SPEWING EX EMPLOYEES MIGHT WANT TO LOOK IN THE MIRROR TO SEE WHY.

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