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Comms chips

Lycium: It's All in the Timing

An Israel-based startup is readying chips to run Sonet or SDH transmissions over a packet network, tying in with an Internet Engineering Task Force (IETF) standards effort for circuit emulation.

The 35-employee Lycium Networks Ltd., which was founded in April 2001, is working on a chip that conforms to specifications being readied by the Pseudo Wire Emulation Edge to Edge (PWE3) working group within the IETF. That effort is about two years old. A series of drafts are completed, and there are some products based on it in the market (see Zarlink Unveils Access Processor).

Using a technique called CESoPSN (for circuit emulation services over packet-switched networks -- how's that for a bite-sized acronym!), the PWE3 groups aims to standardize the means for transporting just about anything -- Frame Relay, Sonet, ATM -- over a packet network.

Proponents see CESoPSN as a technique for managed data services on carrier networks, not for Internet use. "The right place for this technology, at least at first, is a controlled environment, not one with 15 or 50 hops," says Ron Cohen, Lycium's CTO.

He adds that circuit emulation is an extension of the VOIP (voice over IP) idea, whereby entire chunks of TDM traffic, rather than individual connections, are emulated for transmission over a packet network.

As with comedy, the key to circuit emulation is timing, because Sonet's precise clock hierarchy gets masked during packet transport. On the receiving end, as particular STS1s or T1s are being combined into, say, an OC3, their clocks probably won't be in sync.

It's here that Lycium hopes to shine. The company's chips use a technique called adaptive pointer management (APM), where pointer bytes in the Sonet payload are added or removed, nudging the frames into the proper clock rhythm. The pointers themselves are a standard element of Sonet; APM and another technique called explicit pointer adjustment relay are options being codified by PWE3.

APM comes in handy for synchronizing a multitude of channels criss-crossing the network. The service provider usually designates one channel as the master clock and can use APM to match the others to it.

According to Cohen, APM is an efficient method to coordinate network traffic -- but it's harder than it sounds to make it work properly.

"[APM] has a lot of new aspects that people are not that familiar with," he says. "You have to have a good APM mechanism in order not to create lots of interference on the lines. You don't want to just send millions of pointer adjustments."

Lycium expects first samples of its chip, Meridian, in the third quarter. For now, the company is showing its technology using a sample pizza-box system, driven by a four-FPGA (field-programmable gate array) emulation of the chip.

The company is planning two versions of Meridian: a higher-end offering targeting OC3 and OC12 speeds, and a low-cost version for dealing with T1s. Cohen wasn't willing to discuss pricing.

Meanwhile, the PWE3 group has completed draft specifications on the transmission of Frame Relay, ATM, Sonet/SDH, and Ethernet -- yes, they're doing one for Ethernet! -- over packet networks.

One draft remains a sticking point, and that's the one for slower TDM interfaces -- T1 (1.544 Mbit/s) and the like. Groups led by Axerra Networks Inc. and RAD Data Communications Ltd. have diverged on the best method for emulating these links, Cohen says.

But Lycium's chips avoid that argument, he maintains. The company has opted to use the PWE3's Sonet/SDH standard and design one chip architecture for all TDM speeds.

Lycium has raised about $10 million, most of it coming from an $8 million round last year (see Lycium Grabs $8M). Benchmark Capital provided the seed funding, and Accel Partners joined in the 2002 round.

— Craig Matsumoto, Senior Editor, Light Reading

chipsischips 12/5/2012 | 12:03:35 AM
re: Lycium: It's All in the Timing Haven't we heard all of this before about CES with ATM?

CES only matters to a telco where it needs to maintain the global synchronous nature of the network - this has a limited application for low-cost circuit extension - otherwise its a DOA idea. For the enterprise market, this is a non-starter as managing SONET pointers is irrelevant for a point-to-point HDLC link or TIE line.

Adaptive pointer management - how ELSE would one do it? This concept not new and is well baked in the industry.

Finally, where's the market for this type of chip - Circuit extension is nice application for CES, but it's not like RAD is taking the market by storm. I hope Accel & Benchmark know something that I don't.
manojay 12/5/2012 | 12:03:30 AM
re: Lycium: It's All in the Timing
Size does matter, this time around the smaller densities would be preferred.

If the devices are available in both small density configurations, as well as high density configurations, then an optimal(cost effective) services architecture can be formed, like a CO , CPE solution as in DSLAMS.

So looking forward to a single T1 PWE3 solution from semiconductor vendors.

Manojay
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