Plenty of companies say they’re in the lead in developing 10-gigabit network processors -- off-the-shelf, programmable chips for making high-performance packet processing gear -- but none has been able to match the claim that Terago Communications Inc. plans to make today (see Terago Rends the Veil).

Terago, a startup that has until now kept a very low profile, plans to tell the world that it’s already shipping its 10-gig network processor. In other words, it’s actually delivering the goods, rather than making promises about what it might be able to do one day -- and that’s likely to go down particularly well with potential customers.

Why? Because the existing lineup of network processor developers has got a pretty poor track record of promising a lot and delivering a little, according to Terago’s founder and CEO Hemant Trivedi. "It is better to first get a working 10-gig part, rather than preannounce and then have to explain why it was delayed," he says. "We think that creates a whole new credibility for the company.

"As soon as we started shipping samples, interest went through the roof," Trivedi adds. "When real silicon is shown, very rarely do you have people asking how many [microprocessor] cores you put in. Instead they say 'Here's my application. Can you show me how to do that?' It takes the conversation up a level."

All the same, Trivedi must have waited a long time for this moment. He says Terago's work goes back five years to 1996, when he and his cofounders worked at a startup called NeoNetworks. NeoNetworks was developing a core router in the same vein as Foundry Networks Inc. (Nasdaq: FDRY) and Nexabit (a startup acquired by Lucent Technologies Inc. [NYSE: LU] in July 1999). In late 1999, its VCs -- Charter Venture Capital and Signal Lake Ventures -- decided to transform the company into Terago and change its focus.

Terago's origin as a systems company may have given it a better insight into what systems vendors want. And it's concentrating on delivering two things: making the software environment easy to use, and having wirespeed performance at all times (for functions at Layers 2 to 4).

The software environment that Terago has developed merits attention. Rather than requiring the user to program the chip in assembly code or C or any proprietary language, the company has developed a graphical user interface (GUI) that customers use to describe their application. A code generator then creates the code automatically.

The advantage of this is twofold, says Trivedi. First, it shortens the time to market, because customers don't have to optimize code in each iteration of the design cycle. And second, it creates uniformity, so customers know what they are going to get in terms of performance. Standard compiler/debugger software environments can yield different results, he notes, depending on the skill of the programmer.

He suggests that Terago's approach to software is unique, although, coincidentally, another startup, Teja Technologies Inc., which is announcing $12 million in funding today, also offers a GUI and a code generator for network processors (see Teja Takes in $12M). Both companies seem blissfully unaware of each other's existence.

Terago says it started shipping samples of its proNP5010 NPU in December 2001. It is planning to release a traffic manager later in the year, along with coprocessors that provide interfaces for aggregation of lower-speed channels.

Its closest competitors in the 10-gig space are probably Agere Systems (NYSE: AGR), Applied Micro Circuits Corp. (AMCC) (Nasdaq: AMCC), and EZchip Technologies (see OC192 Processors: Who's First? and 10-Gig Processors Shape Up). But the way things are going, it wouldn't be much of a surprise to discover yet another stealthy startup whose product development is as advanced as Terago.

— Pauline Rigby, Senior Editor, Light Reading
http://www.lightreading.com