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Cisco Finds Nemo

Light Reading
News Analysis
Light Reading
9/30/2005

Cisco Systems Inc. (Nasdaq: CSCO) is acquiring yet another tiny technology startup. This time it is paying $12.5 million in cash for Los Altos, California-based network memory specialist Nemo Systems, which is such a young company its public Website is still under construction.

Cisco's press release says Nemo has "developed leading-edge technology in the network memory space that will offer enhanced performance on Cisco's core switching platforms and service modules."

According to Cisco, once incorporated into Cisco's products, the memory technology will allow customers to scale up the use of high-peformance networking gear more efficiently. The deal is expected to close by the end of October.

The company raised its initial investment in March 2003 from founding staff, Benchmark Capital, Mohr Davidow Ventures, and several angel investors with industry experience.

So what's the history of Nemo, which will become part of Cisco's Data Center, Switching and Security Technology Group (DSSTG)? Although Web pages set up by the company are secured against unauthorized access, the company looks to be the brainchild of Stanford University associate professor Nick McKeown, a long-time fixture in the Bay Area networking startup scene who has had prior dealings with Cisco.

According to public information about McKeown, Nemo's CEO and co-founder: "He co-founded Abrizio (acquired by PMC-Sierra Inc.), which built the first commercial terabit switch fabric and was also an architect of the Cisco Systems Inc. GSR 12000 switch fabric, which uses one of his 12 patents. Nick is a Fellow of the Institute of Electrical and Electronics Engineers Inc. (IEEE) and a Fellow of the Royal Academy of Engineering."

McKeown is also a member of the technical advisory board at one of Cisco's core router rivals, Chiaro Networks Inc.. (See Chiaro Intros IP Routing Platform.) He was also an angel investor in router startup Sahasra Networks in 2001. It was acquired by Cypress Semiconductor Corp. (NYSE: CY) in 2002.

At Stanford, McKeown heads up the High Performance Networking Group, which conducts research into "core router architectures [such as] switch scheduling, buffering, packet classification and lookup, using optics in routers, and using parallelism in routers... Novel ideas in the design of the Internet architecture, e.g. load-balancing, optimal routing, deflection routing, and combining packet and circuit switching... Congestion control protocols in the Internet."

Other members of the team include: CTO and co-founder Sundar Iyer, previously a senior systems architect at a content processor firm called Switch-on; VP of marketing and business development Morgan Littlewood, who spent 13 years at Cisco and was founding president of the Multiservice Switching Forum, which is now the MultiService Forum; VP of engineering Zubair Hussain, previously of Abrizio and Chelsio Communications Inc.; and director of ASIC design Jeff Chou, previously of McData Corp. (Nasdaq: MCDTA), Cisco, and Sun Microsystems Inc. (Nasdaq: SUNW). (See Chelsio Demos 10-Gig Technology).

Cisco has been busy buying companies this year, focusing mostly on small network security companies. Its share price stood at $17.86 at the close of the market Thursday. (See Sheer Delight for Cisco, Cisco Nets NetSift for $30M, Cisco Buys Startup for $1.2M per Employee, Finisar Manages With CA.)

— Ray Le Maistre, International News Editor, Light Reading

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nickmckeown
nickmckeown
12/5/2012 | 2:59:24 AM
re: Cisco Finds Nemo
Nemo Systems was co-founded by Sundar Iyer and me. Your article gives me more credit than I deserve: Sundar was the original brains behind the network memory technology.
Scott Raynovich
Scott Raynovich
12/5/2012 | 2:59:23 AM
re: Cisco Finds Nemo
Nick,

Thanks for the clarification. WE used your name in the summary line cause you're probably the more well known of the two of you. It's clear that you were cofounders.

--Scott
digits
digits
12/5/2012 | 2:59:23 AM
re: Cisco Finds Nemo
I know it was "The Incredibles"...

But for Cisco -- who else does it have its eye on?
Balet
Balet
12/5/2012 | 2:59:22 AM
re: Cisco Finds Nemo
...Lightreading?
sjd6
sjd6
12/5/2012 | 2:59:21 AM
re: Cisco Finds Nemo
is now an insignificant pimple on cisco's a$$
Scott Raynovich
Scott Raynovich
12/5/2012 | 2:59:21 AM
re: Cisco Finds Nemo
Google war:

Nick McKeown + networking = 101,000 hits

Sundar Iyer + networking = 862 hits
voyce_overipee
voyce_overipee
12/5/2012 | 2:59:20 AM
re: Cisco Finds Nemo
But it's a self-feeding loop now isn't it? Lightreading used his name because you've heard it more, ergo it gets heard even more.
goundan
goundan
12/5/2012 | 2:59:20 AM
re: Cisco Finds Nemo
What kind of networking memory chips did Nemo pioneer? CAM, SRAM, some kind of low latency DRAM? Can anyone give an idea why Cisco would pay big bucks to acquire them?
ntwkeng
ntwkeng
12/5/2012 | 2:59:17 AM
re: Cisco Finds Nemo
I doubt it is a shared memory architecture for a switch core. More likely a high speed DRAM with very low-latency. SRAM is expensive and DRAM is gate-efficient. But the commodity DRAM vendors are not building products that suit the network industry well. (Unless you want a slow switch with interminable forwarding latencies)

If this is rolling up to the Datacenter/Switching folks at Cisco it's the 'new' crowd of Ullal, Edsall, Gourlay, etc. They've never done a shared memory arcitecture. That was Andy Bechtolsheim and team.

rfc1633
rfc1633
12/5/2012 | 2:59:17 AM
re: Cisco Finds Nemo
Well, I will definitely agree with you that "They've never done a shared memory arcitecture". This is a truth, a result, but why? Did you ever think about CiscoIOS's architecture and how maladroit of its buffer mgmt?

The one who take share memory back, is IOX, a QNX core-based system. Multi-chassis CRS-1, will have a leveled crossbar fabric. Imagine how many queues needed when a packet go across the box!!!

Using crossbar, we must cook the header first and then move the whole packet from ingress mudule to another module, accross the fabric. Then maybe the hdr need to be cooked again on egress module, and get another specific function/asic invovled. Then introduced one more MemIO. If you take a indepth look into GSR LC's stucture, and count the numbers of buffers invovled during a packet go through GSR, you will worry about delay for sure.

For share memory, during the whole packet across path, we need only one time memory read/write. The only thing need be moved here and there is Hdr. Wihle hdr rewriten done, just take the data part patched after the final cooked Hdr. You will definitely get shortest delay.

The more features a box/module perform, the more share memory arch. needed.
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