AMCC, Cortina Chip Into Multiservice
Neither company can produce a truly "universal" line card -- in fact, they're chasing after largely non-overlapping subsets of the market. Startup Cortina Systems is concentrating on data services -- putting Ethernet and its variations onto access and metro rings, primarily. Meanwhile, Applied Micro Circuits Corp. (AMCC) (Nasdaq: AMCC) is looking at more traditional carrier-transport protocols, such as ATM, Frame Relay, and Sonet.
But the idea's the same: to create chameleon line cards for multiple Layer 2 services. That means carriers could keep multiple copies of one line card in inventory, rather than having to stash ATM and Ethernet cards at the same time, for example.
Recognize that argument? It's the same one posed by tunable-laser manufacturers, who claim they can simplify inventories by providing one device usable for multiple wavelengths. But unlike tunable lasers, which proved too expensive at first (see Bandwidth9 Goes Dark), AMCC's and Cortina's chips will supposedly be cheaper than the alternatives, although neither is revealing pricing just yet.
And of course, other chip companies have discussed this idea. Wintegra Inc., which makes network processors for edge equipment, has preached an any-port kind of interface with its WIN800 and WIN807 devices targeting Frame Relay and ATM (see Wintegra Goes Multiservice).
Let's take a look at the startup first. Cortina is launching a chip to handle packet-over-Sonet, Resilient Packet Ring Technology, and Ethernet, as well as plain-vanilla Sonet and ATM, targeting port speeds of OC48 and OC192. Cortina doesn't have a Supercomm booth; it'll be hanging out at the RPR Alliance display.
Cortina CEO Amir Nayyerhabibi is an old hat at OC192. His previous startup, StratumOne Communications, developed OC192 framers and was acquired by Cisco Systems Inc. (Nasdaq: CSCO) in 1999 for $435 million in stock. At Cisco, Nayyerhabibi managed the development of the GSR 12410 and 12416, before leaving to found Cortina in 2001.
Cortina's chip includes a general-purpose processor to churn algorithms, but most of the protocol work is done by dedicated hardware engines. These include multiple mappers for Sonet and ATM, an RPR media access controller (MAC), and Ethernet engines.
"Our experience is that with a processor-like infrastructure, it's hard to meet line speed," Nayyerhabibi says. "We wanted dedicated engines that would do specific tasks, with software running on top of it."
Cortina also says it has integrated the analog technology for 10-Gbit/s transmission, in anticipation of eventually hooking the chip to XFP modules.
Samples of Cortina's first chip, called Milan, came out in December, and it's being evaluated by "multiple customers" including Cisco, says vice president of marketing Zino Chair (another StratumOne vet). A second chip will add Gigabit Ethernet as a speed option, but Cortina officials wouldn't say when that will be ready.
Cortina has raised $32.5 million in two rounds, with investors including El Dorado Ventures, Invesco, Morgenthaler, and Redpoint Ventures. The company has about 50 employees split between Mountain View, Calif., and Ottawa.
AMCC, meanwhile, is using network processors as the center of its 'Mission' offering, which the company is debuting this week at Supercomm (see AMCC Reveals Single-Platform Model).
Mission's mission is a bit different from Cortina's, targeting ATM, Frame Relay, Ethernet, and Sonet. AMCC's offering also has more of an "edge/access" flair than does Cortina's, as it's intended for OC48 traffic or dual lines of Gigabit Ethernet.
Another difference is that AMCC's platform consists of three chips, as opposed to Cortina's single-chip smorgasbord. And while Cortina wanted to avoid processors as much as possible, AMCC developed Mission because it had the processor to build around.
"People have talked about doing any-service-any-port for a long time, but it's only as the network processor has matured that it's become something you can really do," says Keith Morris, director of marketing for AMCC.
Frequently, network processors are bought by customers who want to program their own software, but that won't be the case with Mission. "It's more of an ASSP model, where all of the software is provided" by AMCC, Morris says.
In terms of hardware, Mission comprises three parts, only one of which is available now: the Evros mapper (see AMCC Gets New IC, Loses COO). The platform also will use the nP3700 network processor, which AMCC has discussed in sketchy detail (see Net Processors Aim for Access), and a newly announced HDLC/ATM controller called Tigris.
The Mission combination won't start sampling until the first quarter of 2004 -- when the nP3700 is due to sample -- with volume production slated for mid 2004. The Tigris chip, which will handle data rates from T1 up to OC12, is scheduled to sample later this year.
— Craig Matsumoto, Senior Editor, Light Reading