PSI2G100S integrates a Sonet/SDH OC48 transceiver, CDR circuitry, a SerDes, 100k gates of programmable logic, and 240 kbits of memory

May 6, 2001

1 Min Read

SAN JOSE, Calif. -- Cypress Semiconductor (NYSE:CY) today announced the availability of samples of the PSI2G100S, the second in its family of Programmable Serial Interface (PSI(TM)) chips. The PSI2G100S integrates a SONET/SDH OC-48 (2.5 Gbps) transceiver, clock data recovery (CDR) circuitry, a SERDES, 100k gates of programmable logic, and 240 Kbits of communications memory, targeting OC-48/STM-12 optical terminators, SONET/SDH routers and add-drop MUX subsystems.

"Cypress is delivering the world's first programmable SONET/SDH OC-48 PHY," said Geoff Charubin, director of marketing for Cypress's data communications division. "The PSI2G100S brings the speed and flexibility of our programmable OC-48 SERDES to SONET/SDH applications, enabling communications solutions designers to develop cutting edge optical solutions and get them to market quickly-and into the OC-48 segment, the sweet spot of the WAN market."

Cypress Semiconductor Corp.

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