Chip packaging may not make many headlines but is critical in components evolution, explains Sanmina's John Pokinko.

Carolyn Mathas

May 1, 2014

9 Min Read
Packaging: Don't Keep It Under Wraps

Packaging doesn't sound like it's a subject that would set the world alight, but talk to individuals such as John Pokinko, and you hear a different story.

Pokinko is the VP of design engineering at the Optical and Microelectronic division of global hardware design and manufacturing giant Sanmina, a company with quarterly revenues of about $1.5 billion.

We met him at the recent OFC event in San Francisco, where the conversation very soon turned to importance of component packaging, prompting a more in-depth interview on the topic.

Here's how the conversation went…

Light Reading: You indicate that packaging is of critical importance. Yet, at OFC, it doesn't seem to be stressed. Why is it so seldom discussed in depth?

John Pokinko: As we know, semiconductor packaging is a very broad discipline, including key elements such as semiconductor die and board level interconnects, electrical/optical signal integrity, thermal management, mechanical/structural integrity, interconnection/substrate materials, environmental protection/reliability, assembly and test processes, and so on. Competing factors such as performance, size, power, reliability, and cost drive various technical solutions.

My input is more from the perspective of electrical/optical packaging for long-haul/line applications, and focuses on component level packaging, rather than CCA/system level packaging.

Packaging in general is recognized as one of the important elements of the component technology evolution. Continuing increases in signal speed/frequency, higher density, integration of optical and electronic devices, and increases in thermal power, coupled with relentless cost pressure, drive the importance of packaging solutions. In the past, with systems operating at much slower speeds, it was less critical -- it was seen as "transparent" to signals, and only needed for protection of semi device/die and for translation of interconnection density between die and PCB.

Figure 1: John Pokinko: 'The cost of high-speed optical and electrical component packaging will be a key factor in future higher-speed systems.' John Pokinko: 'The cost of high-speed optical and electrical component packaging will be a key factor in future higher-speed systems.'

Light Reading: What has happened to move it to the forefront?

John Pokinko: With increased signal speeds, the interconnections within packaging has become a growing factor in signal performance, and packaging is becoming more and more a limitation to the speeds and density required by next-gen systems, so it is increasingly being emphasized as a key technology to achieve future systems performance at acceptable cost. Also, in cases where packaging helps provide unique solutions, which differentiate a product from the competition, then the packaging IP [intellectual property] has been kept secret and not advertised very much.

Light Reading: What are the top three major challenges in component packaging?

John Pokinko: In short, signal speed/bandwidth, thermal power, and size/density. All of these key factors need to be addressed at an acceptable cost and at sufficient reliability. The cost of high-speed optical and electrical component packaging will be a key factor in future higher-speed systems. Higher and higher levels of semiconductor device integration (optics and electronics), coupled with higher signal speeds and more dissipated power, create significant challenges in packaging interconnection technologies, materials, thermal design and product manufacturing technologies.

Another challenge faced by the industry is the ability to reliably package increasingly fragile semiconductor devices. Increased functional integration (electro-optics) and signal speed is driving ever smaller features of devices with ever increasing IO density. For next-gen high-speed systems, manufacturing technology also represents a significant challenge in achieving consistent and very high component performance at predictable low cost.

Light Reading: Where is the solution currently for each challenge?

John Pokinko: There are more sophisticated design and modeling techniques for integrated RF/Electrical, optical and thermo-mechanical design. Progress in modeling tools targeting the packaging challenges is an important element of the solution going forward. More sophisticated signal integrity, RF/electrical, optical design, with elimination of multiple interconnect interfaces between individual devices, are in the works.

Advancements continue to evolve, including:

  • Material technologies, including substrates, thermal materials, bonding materials, EMI/EMC materials.

  • Interconnection technologies -- micro flip-chip for electrical and optical interconnects, optical alignment/coupling, interposers, die stacking, and so on.

  • Semiconductor technologies with more functional integration, allowing for more efficient packaging solutions such as silicon photonics.

  • Multichip module technologies with direct interconnection between multiple semiconductor devices within the same package, including higher levels of package based-integration of high-speed electrical and optical devices.

  • Manufacturing and test technologies. Manufacturing process technology -- for example, process variance and its impact on performance and cost -- need to be part of product design from the earliest stages of product development to ensure consistent highest performance with acceptable and predictable cost.

Light Reading: What needs to be solved first?

John Pokinko: The issues are inter-dependent and cannot be solved independently. The overall progress relies on concurrent progress in all areas, with product design processes that create the right balance of requirements and individual solutions at acceptable cost. Close alignment between semiconductor device level design with increased integration, such as silicon-integrated photonic devices, and concurrent packaging design, highly optimized for overall highest level of component performance, represent a key element of the solution going forward. Close coupling of manufacturing process and test technology evolution is also very critical to achieve overall predictable high performance with acceptable cost.

Packaging design needs to be an integral element of component design from the earliest stages of product development.

A challenge of new high-speed systems is the need for concurrent design at system and key strategic custom components. Component packaging represents a vital element of the overall solution.

Light Reading: What materials are coming into play and how do they affect the issue of packaging?

John Pokinko: There is a continuing progress in material technologies to better meet the needs of high-performance component packaging. These include multilayer substrates with improved RF/electrical performance, higher density and integrated thermal solutions, PLC [Programmable Logic Controller] circuits with enhanced optical features, improved optical coupling materials, bonding materials, thermal interface materials, and so on.

Light Reading: How are issues of size and power considerations affecting packaging?

John Pokinko: As the performance and cost requirements drive the need for higher integration, packaging solutions must consider an increase in thermal density and IO density. Packaging thermal solutions need to be very tightly coupled with higher-density interconnection solutions to achieve a combination of overall small size with acceptable thermal performance.

Advancement in fine-feature substrates, high-density IO interconnection technologies, high-performance thermal conduction materials, and spreading and cooling technologies, are key to achieve continuing progress in increasing power and reducing size.

The issue of power and size does not only involve the amount of dissipated heat that needs to be extracted and dissipated within an ever-decreasing space, but it also involves the issue of heat isolation between heat-dissipating and heat-sensitive devices. This issue is of growing significance in the context of increased levels of electro-optical integration, required to achieve performance, size and cost.

High-density interconnections and high-heat-flux thermal interface design of the component needs to be very tightly coupled with thermo-mechanical and interconnection design at the circuit card/system level. This is especially true for unique custom components that are needed for future generation systems.

Light Reading: What is happening near- and long-term as far as packaging trends?

John Pokinko: Packaging trends are very tightly coupled to trends in semiconductor component design, driven by ever increasing speeds/bandwidth, density/size reduction, increased level of functionality, and electro-optical integration. Now 25-32 Gbit/s is evolving towards 50-80 Gbit/s line rates, IO counts are increasing, device sizes are increasing (more processing power and higher level of integration), more devices with E-O integrations requiring both RF/high speed and optical interfaces in the same package, and power density is increasing due to increased density and chip-level integration. As such, packaging solutions are moving away from standard packaging solutions with single optical or electronic devices that are interconnected at the card level. They are moving towards multichip packaging E-O modules. Also, with the introduction of silicon photonics, optical packaging solutions often no longer require hermeticity, which opens up many possibilities for different lower-cost substrates and packaging materials with better dielectric properties for high-speed performance.

High-performance systems are typically highly optimized around custom strategic components with system IP embedded in the components. System companies are increasingly relying on custom strategic components, and in many cases are developing their own unique components with closely guarded IP. This is evident in 100G, especially for long-haul applications, and will most likely be even more critical for future higher speed systems. These custom components typically require custom, very advanced packaging solutions to address speed, power, density, E-O integration, driving the packaging technology forward, including manufacturing process and test technologies. These packaging solutions are very much customized around the component functionality and system requirements.

Advancements in component packaging needed for future higher performance systems require very close alignment between design and manufacturing technologies, creating opportunities for integrated engineering and manufacturing companies like us, as we have strong capabilities in component level packaging design and manufacturing. Sanmina's Optical and Microelectronic division has been formed specifically to work with customers requiring solution in high performance RF and optical components design and manufacturing.

Light Reading: How much of your own efforts at Sanmina go into the issue of packaging?

John Pokinko: At the Optical and Microelectronic division of Sanmina, we work with our customers to develop high-performance custom optical and RF/Microwave component solutions, highly tailored to customer system architecture, with differentiated performance. High-performance component packaging represents a vital element of the overall component solution.

Significant R&D investments ensure leading edge design, modeling tools and resource skills in areas of RF/electrical design, optical design, thermo-mechanical and microelectronic design, reliability engineering, and manufacturing process and test technology. Close to 50 design engineers are working with customers to develop custom components and sub-system solutions highly tailored to the customer system requirements. Design teams closely work with manufacturing teams in various locations worldwide.

Solutions range from packaging of individual optical and RF devices to integrated electro-optical modules and blades, and are encompassing a strong element of design for manufacturing to ensure consistent performance, low cost, with rapid new product introduction and volume manufacturing scalability.

— Carolyn Mathas, contributing editor, special to Light Reading

About the Author(s)

Carolyn Mathas

A site editor for UBM's EDN and EE Times, Mathas covers LED, Sensors, Wireless Networking and Industrial Control technologies. She also writes for Hearst Publishing's Electronic Products. Previously, she was a Sr. Editor and West Coast Correspondent for PennWell's Lightwave Magazine and CleanRooms Magazine, respectively. Mathas holds an MBA from New York Institute of Technology and a BS in Marketing from University of Phoenix. In addition to editorial, her past life experience includes Director of Marketing for Securealink and Micrium, Inc., providing PR services to such companies as Philips Semiconductors, Altera, Boulder Creek Engineering, and ghost writing for Lucent Technologies. 

Subscribe and receive the latest news from the industry.
Join 62,000+ members. Yes it's completely free.

You May Also Like