Xelerated's 100G Hits the Road
So, I stopped into Xelerated's Santa Clara, Calif., outpost for a look. The demo, meant to show that line-rate 100-Gbit/s processing is possible, uses an Ixia (Nasdaq: XXIA) traffic generator that feeds a 48-port reference board.
It's been a long time coming. Samples came out in June, about two years after Xelerated announced the product line. (See Xelerated Finally Gets 100G.)
The chip could still be tweaked from here, but the basics are all working. The demo weaves a 1-Gbit/s signal in and out of the processor for what amounts to 50 ingress/egress passes (I'm oversimplifying here). The result is wirespeed 100-Gbit/s throughput, or as close as is practical -- I think it got as high as 99.8 Gbit/s for jumbo frames. The throughput drops to 71.4 Gbit/s for worst-case, 64-byte frames.
Two of the chips would be required for a real 100-Gbit/s board, one for full 100-Gbit/s ingress and one for egress. That's also the case for competitor EZchip Technologies Ltd. (Nasdaq: EZCH), but EZchip says it's coming up with a 200-Gbit/s chip, the NP-5. (See EZchip Goes 200 Gig.)
Xelerated's other long-awaited chip, the AX310 for the access market, is also ready to hit the streets; the company plans to announce sampling on Monday. This is the chip formerly called the HX310, but it's different enough from the other HXs that Xelerated decided to give it a different letter.
— Craig Matsumoto, West Coast Editor, Light Reading