Siverge Picks Up Chip Trail

Startup Siverge Networks wants to revisit the glory days of PMC-Sierra Inc. (Nasdaq: PMCS) and similar chip companies, claiming it can pick up where they left off.

The company is bringing out a line of chips for handling Layer 1 and 2 transport -- a market that led companies like PMC-Sierra, Applied Micro Circuits Corp. (Nasdaq: AMCC), and Vitesse Semiconductor Corp. (Nasdaq: VTSS) to riches during the dotcom bubble. (See PMC-Sierra Struts on the Street and Semiconductor Merger Mania.)

Those companies cooled substantially during the telecom downturn and started looking into other markets -- storage, in particular. (See AMCC Moves Into Storage, PMC Bites a Bit of Agilent, and Vitesse Unloads Storage Biz.)

And, of course, they've had some other troubles. (See Vitesse Execs Get the Axe.)

This adds up to a gap in what should have been the development of physical-layer chips, Siverge CEO and chairman Yuval Berger claims. Over time, chips tend to get integrated together and to pack on more functions -- but the big TDM-chip leaders of 1999 haven't been able to make those investments.

"There's been no innovation in the field for a decade," Berger says, maybe with a touch of hyperbole.

Looking at just the past few years, though, Berger says there have been the usual advances in manufacturing -- such as chips getting smaller -- but without any accompanying big-picture integration developments.

That, he claims, has left equipment vendors hungry for new types of chips. "When they're forced to be as efficient as possible and to integrate more functions onto a linecard, today they are going back more and more to FPGAs."

The reason those chips are still important is that, even though Ethernet and IP are taking over the telecom world, Sonet (Synchronous Optical NETwork) and SDH (Synchronous Digital Hierarchy) and other TDM interfaces aren't going away for years.

So, here's the integration play Siverge proposes -- one chip to handle, among other protocols: Frame Relay; Asynchronous Transfer Mode (ATM) including inverse multiplexing; Sonet/SDH with add-ons such as virtual concatenation (VCAS); and the Plesiochronous Digital Hierarchy (PDH) protocols (T1/E1 stuff).

The SV3640 family of chips handle all those protocols at varying line speeds up to OC48 (2.5 Gbit/s). Siverge is also introducing cheaper versions that focus on subsets of the protocols, such as the SV3620 chips that include Ethernet-over-Sonet coverage. Those would be the chips Siverge was willing to drop hints about in October, before it was revealing its full business plan. (See Siverge Networks and Spotlight Ethernet.)

The SV3640 and its spinoffs are collectively called the Griffin family and are expected to sample in January.

Ethernet chips would come next, with samples possible in early 2010. Mixing the two -- Ethernet and all manners of TDM -- would be a logical step, but Berger concedes this isn't feasible just yet.

— Craig Matsumoto, West Coast Editor, Light Reading