Comms chips

Freescale Advances Its Multicore Ambitions

Freescale Semiconductor Inc. is making the first major upgrade to its three-year-old QorIQ line of multicore processors.

The new chips are called the Advanced Multiprocessing (AMP) series, and it consists of beefier variants of QorIQ, going up to 24 virtual processor cores. (That's actually 12 processor cores, each capable of running two independent threads.) Previous QorIQ chips used eight cores at most.

The chip is getting its launch Tuesday at Freescale's developer event in San Antonio, Texas. The first AMP chip to come out will be the largest -- the 24-virtual-core T4240 -- which is due to sample in the first quarter of 2012.

Freescale is also touting the amount of integration on the AMP chips, with extras including digital signal processing, compression/decompression engines and various acceleration engines.

Why this matters
Freescale claims AMP is important because the rise of cloud computing is going to create performance demands that normal processor advancements won't be able to cover.

In other words, Freescale believes just adding cores won't cut it. AMP's maximum of 24 cores isn't that spectacular a number; Cavium Inc. (Nasdaq: CAVM) has 32-core chips, Netronome sports 40 cores and startup Tilera Corp. has come out with a 100-core chip. Freescale says AMP gets its juice from more subtle ways of increasing performance, such as letting software partition itself across multiple cores.

Keeping the number of cores down helps to limit the complexity of programming the chip, says John Dixon, a Freescale marketing manager.

For more
Here are some of the other big moves in multicore from the past year or so.

— Craig Matsumoto, West Coast Editor, Light Reading

joferrei 12/5/2012 | 5:01:26 PM
re: Freescale Advances Its Multicore Ambitions

Most of the development re: multicore processing is driven by processor makers delivering N-core hardware. The real gating factor isn't however at this point the number of hardware core/threads on a chip, but how to parallelize the application processing on multiple cores, and how to efficiently share the multicore / parallel processing hardware resources between the software applications with dynamic processing load variations.

Some worthwhile resources/references on the topic:





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