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Comms chips

Bandwidth Hunger Drives Chip Designs

SAN JOSE, Calif. -- With telecom demand finally on the upswing, chipmakers are reveling in carriers' demands for increased bandwidth and more sophisticated processing, as speakers discussed at Wednesday's Light Reading seminar, "Next-Gen Networking Chips."

Sure, bandwidth increases are the normal course of telecom. But today's capex plans reflect an unprecedented "urgency," said Imran Hajimusa, a senior director of broadband access for Infineon Technologies AG (NYSE/Frankfurt: IFX).

"The way to do it is to push the fiber closer" to the user, with architectures like PONs, Hajimusa said. "This is the main trend I've seen in all the capex spending from carriers around the world."

Simon Stanley, Heavy Reading analyst-at-large and moderator for the day's sessions, showed numbers indicating at least 39.3 Mbit/s is needed for realistically delivering triple-play services. (The package used as an example included HDTV and two MPEG-2 digital TV feeds, among other services; these ate up 29.2 Mbit/s of that bandwidth.)

But that's a bare minimum figure; panelists agreed service providers will want wiggle room and expansion space that bring the required bandwidth up to 50 Mbit/s. And that might not be the ceiling.

"I've given up trying to figure out what bandwidth needs are," said Matt Squire, chief technology officer of Hatteras Networks Inc. , the lone equipment vendor among the day's panelists. "Whatever bandwidth you put out, people are going to use -- and two years from now, it's not going to be enough."

Bandwidth increases might be inevitable, but the means of delivery still gets debated. On the optical side in particular, Squire bemoaned the lack of universal PON standards.

"The standards bodies are not doing their job converging," he said, noting that EPON and GPON remain disparate. A 10-Gbit/s EPON is in the works, and Squire guesses GPON will start a similar effort. "I don't think this is going to get better." (See Ethernet Reaches for 100-Gig.)

Most of those PON networks will use copper connections to cover the final span to the home or office, and that's where DSL standards are starting to compete. VDSL, originally designed for short connections within a building, is getting more play as an outdoor technology, panelists said. In that sense, it's beginning to rival ADSL, which was crafted for longer connections and traditionally has been considered more suitable for outdoor networks.

With the VDSL2 standard supporting longer loops, carriers are now using VDSL for spans of 3,000 or 4,000 feet outdoors -- one example being Verizon, which uses VDSL to take its FiOS service to the home. "Some people are even trying to do 6,000 feet, which I think is a bit extreme," Hajimusa said. But in general, he noted, "VDSL will take some of the share away from ADSL."

Regardless of standards clashes, the technology to get high-speed streams to the customer is available. For services like IPTV, deployment is hobbled by problems elsewhere in the network. "The broadband part of this is well understood," Squire said. "What we don't have is the content ready and the IPTV distribution software."

In addition to quick delivery, carriers are looking for cheaper equipment -- that's always been the case -- and speakers noted standardization will help, particularly under the Advanced Telecom Computing Architecture (AdvancedTCA) banner. MicroTCA, a standard for smaller boxes that use advanced mezzanine cards in place of ATCA blades, could be a big factor in future designs, speakers said. (See MicroTCA Looks Like a Winner.)

Stanley also expects to see Ethernet continue to dominate as an ATCA fabric interface. Gigabit Ethernet is the leader now, and 10-Gbit/s Ethernet should follow, he said. "There is going to be use of Advanced Switching and RapidIO, but 10-Gbit/s Ethernet is going to be dominant," he said.

Standards matter even down to the interfaces between chips, speakers said. That's because linecards increasingly carry a mix of ASICs, FPGAs, and merchant chips such as network processors. "If you're doing ASICs, you should try to make your interfaces standard interfaces," said Brian Alleyne, senior director of program management for Bay Microsystems Inc.

"Most of the merchant silicon vendors caught up," said Asif Hazarika, senior manager of the Networking Solutions Business Group at Fujitsu Microelectronics America Inc.

The drive toward new services is increasing the complexity of linecard chips. For example, more traffic queues and more levels of QOS hierarchy are required, because carriers want to treat users and services differently according to what they're paying. "Unless the silicon can provide the ability to bill those services, and bill separately, we won't be able to reach the next stage," Alleyne said.

On the enterprise side, chip and equipment vendors still await a surge in 10-Gbit/s Ethernet spending. The key hurdle, most agree, is the lofty price of the technology. (See Lower Prices Boosting 10-GigE.)

Not surprisingly, speakers from KeyEye Communications Inc. and Vativ Technologies Inc. , chip firms pushing 10-Gbit/s Ethernet over copper, said the availability of copper options could help kick demand into gear.

Research from Communications Industry Researchers Inc. (CIR) predicts 10-Gbit/s Ethernet could ship 1.5 million ports in 2010, but Stephen "Mike" McConnell, vice president of strategic marketing at KeyEye, challenged that, saying he's expecting the figure to be about twice that big. "I don't think this is a view that fully understands what copper can bring to the table," he said.

— Craig Matsumoto, Senior Editor, Light Reading


Interested in learning more on this topic? Then come to our upcoming conference, Ethernet Expo 2006, a conference and exhibition focused on the evolution of Ethernet as a ubiquitous enabler of next-gen services in telecom networks, targeting residential and enterprise users. To be staged in New York City on October 23-25, admission is free for attendees meeting our prequalification criteria. For more information, click here.


Pete Baldwin 12/5/2012 | 3:44:05 AM
re: Bandwidth Hunger Drives Chip Designs Xilinx talked about using a Virtex FPGA to implement what's basically a network processor. This has always been possible, of course, but they've got a nice angle now: You only add as many packet-processing engines as you need. Given the number of designs targeting the access market -- where some network processors would be overkill -- that could be attractive.

Have any techy types looked into this possibility? I'm curious how it stacks up to a "proper" network processor.
Michael Poole 12/5/2012 | 3:44:05 AM
re: Bandwidth Hunger Drives Chip Designs "...carriers are now using VDSL for spans of 3,000 or 4,000 feet outdoors -- one example being Verizon, which uses VDSL to take its FiOS service to the home."

Huh? I thought the special thing about Verizon's FiOS was supposed to be that it's 100% optical. What's VDSL got to do with the price of fish?

M
ron202 12/5/2012 | 3:44:04 AM
re: Bandwidth Hunger Drives Chip Designs for slower processing power usually you need a lower cost and fpga will not do it , for higher processing power (say 20-40Gbps NP ) fpga will not do it.
Usually you may use an fpga as a temporary solution in a niche market (or when you don't have enough money/expertise to do an asic) but I am afraid that there are not a lot of niche markets out there.
jmunn 12/5/2012 | 3:44:02 AM
re: Bandwidth Hunger Drives Chip Designs There has been some sales push to use softcore processors to build NP processing capability. Unfortunately, the performance is not high and the complexity of programing a "custom" NP is significant.

Given that some standards bodies are developing different solutions to the same problems in the L2 space, it is useful to have some flexibility in the packet processing hardware and that is where FPGAs can help.

There is still a "Network Processors are Evil!" mindset by those companies burned by failed projects. The NP vendors have not made any great strides in overcoming this barrier to entry. This makes it very difficult to sell NP based architectures to senior management which basically leaves FPGAs to take up the slack in the reconfigurable packet processing area.

jmunn
paolo.franzoi 12/5/2012 | 3:44:01 AM
re: Bandwidth Hunger Drives Chip Designs
http://www.ethernitynet.com/

There are plenty of jobs that FPGAs are not suited for. But for Layer 2ish things at modest speeds, they are perfectly fine. Whether you take them to ASICs is a matter of volume. To get into 65nM ASICs is a big deal (90 nM is nothing to sneeze at). So, depending on the application and the volume FPGAs are fine.

As for NPs, they fell to the same stupidity as DSL chips and FPGAs before them. Yeah, they run at super high speed as long as you don't turn on the classifiers or want any Traffic Management functions. Chip companies really have to stop overmarketing to the point of lying. My favorite has been Ikanos - yes, it can do all of those things, BUT none of them at the same time.

seven
wwatts 12/5/2012 | 3:44:01 AM
re: Bandwidth Hunger Drives Chip Designs Seems like a really bad idea. Take FPGA technology with the main weakness that its not as fast or dense as an ASIC solution, put into it Network Processing engines which have the main weakness that they are not as fast as an ASIC hardware solution and you get something that is slower than either an FPGA solution or a Network processor and less dense (in network processing cores and/or logic) than either.

Bad, bad, bad idea. I doubt you are going to find many serious system designers who are going to waste much time on this type of solution.

What might make sense is building blocks of a network processor that could be snapped together in an FPGA... seperate microcoded packet editing engine (the only thing a NP really does well), Queuing engine, classification engine etc. A full blown NP core in a FPGA is lunacy though.
Munster 12/5/2012 | 3:43:54 AM
re: Bandwidth Hunger Drives Chip Designs ron202 wrote:
"for slower processing power usually you need a lower cost and fpga will not do it , for higher processing power (say 20-40Gbps NP ) fpga will not do it."

As a matter of fact, there is a Danish company called TPACK that has done exactly that:
http://www.tpack.com/publicatt...

Looks like it is based on Altera rather than Xilinx, but FPGA technology is catching up.
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