Comms chips

Avago Tests 20-Gig SerDes

SAN JOSE, Calif. -- Avago Technologies today announced that it has demonstrated 20 Gbps SerDes performance in 40nm CMOS technology. Continuing its legacy of embedded SerDes leadership, Avago’s 40nm cores represent its seventh generation of high performance SerDes IP. With over 60 million SerDes channels shipped, Avago has a proven history of delivering reliable, high-performance ASICs and now achieves another milestone by measuring 20 Gbps SerDes in TSMC’s 40 nm CMOS process.

Ideal for data center applications, the embedded SerDes technology will support a broad range of standards, such as PCI Express, Fibre Channel, XAUI, CEI-11G, XFI, 802.3ap (KR), and SFI and is suitable for chip-to-chip, board-to-board, chasis-to-chasis, and backplane implementations. Inherently flexible due to its modular architecture and multi-rate capability, Avago’s SerDes IP also offers power management options which are vital in today’s energy-sensitive data center environments.

“Avago’s ongoing leadership in embedded SerDes has enabled our steady growth in the networking, storage, and computing markets,” said Frank Ostojic, vice president and general manager of Avago Technologies’ ASIC products division. “With our early demonstration of SerDes IP in leading-edge CMOS technology, Avago can enable our customers to meet the speed, throughput, and power requirements that their marketplaces demand.”

Avago Technologies Pte.

Be the first to post a comment regarding this story.
Sign In